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wdenk0db5bca2003-03-31 17:27:09 +00001/*
2 * (C) Copyright 2003
3 * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
wdenk8bde7f72003-06-27 21:31:46 +000020 * Foundation,
wdenk0db5bca2003-03-31 17:27:09 +000021 */
22
23/*
24 * File: serial.c
wdenk8bde7f72003-06-27 21:31:46 +000025 *
26 * Discription: Serial interface driver for SCI1 and SCI2.
Wolfgang Denk53677ef2008-05-20 16:00:29 +020027 * Since this code will be called from ROM use
28 * only non-static local variables.
wdenk0db5bca2003-03-31 17:27:09 +000029 *
30 */
31
32#include <common.h>
33#include <watchdog.h>
34#include <command.h>
35#include <mpc5xx.h>
36
Wolfgang Denkd87080b2006-03-31 18:32:53 +020037DECLARE_GLOBAL_DATA_PTR;
wdenk0db5bca2003-03-31 17:27:09 +000038
39/*
wdenk8bde7f72003-06-27 21:31:46 +000040 * Local function prototypes
wdenk0db5bca2003-03-31 17:27:09 +000041 */
42
43static int ready_to_send(void);
44
45/*
46 * Minimal global serial functions needed to use one of the SCI modules.
47 */
48
49int serial_init (void)
50{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020051 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk0db5bca2003-03-31 17:27:09 +000052
53 serial_setbrg();
54
55#if defined(CONFIG_5xx_CONS_SCI1)
56 /* 10-Bit, 1 start bit, 8 data bit, no parity, 1 stop bit */
57 immr->im_qsmcm.qsmcm_scc1r1 = SCI_M_10;
wdenk8bde7f72003-06-27 21:31:46 +000058 immr->im_qsmcm.qsmcm_scc1r1 = SCI_TE | SCI_RE;
wdenk0db5bca2003-03-31 17:27:09 +000059#else
wdenk8bde7f72003-06-27 21:31:46 +000060 immr->im_qsmcm.qsmcm_scc2r1 = SCI_M_10;
wdenk0db5bca2003-03-31 17:27:09 +000061 immr->im_qsmcm.qsmcm_scc2r1 = SCI_TE | SCI_RE;
62#endif
63 return 0;
64}
65
66void serial_putc(const char c)
wdenk8bde7f72003-06-27 21:31:46 +000067{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk8bde7f72003-06-27 21:31:46 +000069
wdenk0db5bca2003-03-31 17:27:09 +000070 /* Test for completition */
71 if(ready_to_send()) {
72#if defined(CONFIG_5xx_CONS_SCI1)
wdenk8bde7f72003-06-27 21:31:46 +000073 immr->im_qsmcm.qsmcm_sc1dr = (short)c;
wdenk0db5bca2003-03-31 17:27:09 +000074#else
75 immr->im_qsmcm.qsmcm_sc2dr = (short)c;
wdenk8bde7f72003-06-27 21:31:46 +000076#endif
wdenk0db5bca2003-03-31 17:27:09 +000077 if(c == '\n') {
78 if(ready_to_send());
79#if defined(CONFIG_5xx_CONS_SCI1)
80 immr->im_qsmcm.qsmcm_sc1dr = (short)'\r';
81#else
82 immr->im_qsmcm.qsmcm_sc2dr = (short)'\r';
83#endif
84 }
85 }
86}
87
88int serial_getc(void)
wdenk8bde7f72003-06-27 21:31:46 +000089{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020090 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk0db5bca2003-03-31 17:27:09 +000091 volatile short status;
92 unsigned char tmp;
wdenk8bde7f72003-06-27 21:31:46 +000093
wdenk0db5bca2003-03-31 17:27:09 +000094 /* New data ? */
95 do {
96#if defined(CONFIG_5xx_CONS_SCI1)
wdenk8bde7f72003-06-27 21:31:46 +000097 status = immr->im_qsmcm.qsmcm_sc1sr;
wdenk0db5bca2003-03-31 17:27:09 +000098#else
99 status = immr->im_qsmcm.qsmcm_sc2sr;
100#endif
101
102#if defined(CONFIG_WATCHDOG)
wdenk8bde7f72003-06-27 21:31:46 +0000103 reset_5xx_watchdog (immr);
wdenk0db5bca2003-03-31 17:27:09 +0000104#endif
wdenk8bde7f72003-06-27 21:31:46 +0000105 } while ((status & SCI_RDRF) == 0);
106
wdenk0db5bca2003-03-31 17:27:09 +0000107 /* Read data */
108#if defined(CONFIG_5xx_CONS_SCI1)
wdenk8bde7f72003-06-27 21:31:46 +0000109 tmp = (unsigned char)(immr->im_qsmcm.qsmcm_sc1dr & SCI_SCXDR_MK);
wdenk0db5bca2003-03-31 17:27:09 +0000110#else
111 tmp = (unsigned char)( immr->im_qsmcm.qsmcm_sc2dr & SCI_SCXDR_MK);
112#endif
113 return tmp;
114}
115
116int serial_tstc()
117{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk8bde7f72003-06-27 21:31:46 +0000119 short status;
wdenk0db5bca2003-03-31 17:27:09 +0000120
121 /* New data character ? */
122#if defined(CONFIG_5xx_CONS_SCI1)
wdenk8bde7f72003-06-27 21:31:46 +0000123 status = immr->im_qsmcm.qsmcm_sc1sr;
wdenk0db5bca2003-03-31 17:27:09 +0000124#else
125 status = immr->im_qsmcm.qsmcm_sc2sr;
126#endif
wdenk8bde7f72003-06-27 21:31:46 +0000127 return (status & SCI_RDRF);
wdenk0db5bca2003-03-31 17:27:09 +0000128}
129
130void serial_setbrg (void)
131{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk0db5bca2003-03-31 17:27:09 +0000133 short scxbr;
134
135 /* Set baudrate */
136 scxbr = (gd->cpu_clk / (32 * gd->baudrate));
137#if defined(CONFIG_5xx_CONS_SCI1)
wdenk8bde7f72003-06-27 21:31:46 +0000138 immr->im_qsmcm.qsmcm_scc1r0 = (scxbr & SCI_SCXBR_MK);
wdenk0db5bca2003-03-31 17:27:09 +0000139#else
140 immr->im_qsmcm.qsmcm_scc2r0 = (scxbr & SCI_SCXBR_MK);
141#endif
142}
143
144void serial_puts (const char *s)
145{
146 while (*s) {
147 serial_putc(*s);
148 ++s;
149 }
150}
151
152int ready_to_send(void)
153{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenk0db5bca2003-03-31 17:27:09 +0000155 volatile short status;
156
wdenk8bde7f72003-06-27 21:31:46 +0000157 do {
wdenk0db5bca2003-03-31 17:27:09 +0000158#if defined(CONFIG_5xx_CONS_SCI1)
wdenk8bde7f72003-06-27 21:31:46 +0000159 status = immr->im_qsmcm.qsmcm_sc1sr;
wdenk0db5bca2003-03-31 17:27:09 +0000160#else
161 status = immr->im_qsmcm.qsmcm_sc2sr;
162#endif
163
164#if defined(CONFIG_WATCHDOG)
wdenk8bde7f72003-06-27 21:31:46 +0000165 reset_5xx_watchdog (immr);
wdenk0db5bca2003-03-31 17:27:09 +0000166#endif
wdenk8bde7f72003-06-27 21:31:46 +0000167 } while ((status & SCI_TDRE) == 0);
168 return 1;
wdenk0db5bca2003-03-31 17:27:09 +0000169
170}