blob: 5b3fdd32c16d5ca6f8771b3ad2ec52a7d700bc3f [file] [log] [blame]
wdenk983fda82004-10-28 00:09:35 +00001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * CPU specific code for the MPC8220 CPUs
26 */
27
28#include <common.h>
29#include <watchdog.h>
30#include <command.h>
31#include <mpc8220.h>
32#include <asm/processor.h>
33
Wolfgang Denkd87080b2006-03-31 18:32:53 +020034DECLARE_GLOBAL_DATA_PTR;
35
wdenk983fda82004-10-28 00:09:35 +000036int checkcpu (void)
37{
wdenk983fda82004-10-28 00:09:35 +000038 ulong clock = gd->cpu_clk;
39 char buf[32];
40
41 puts ("CPU: ");
42
43 printf (CPU_ID_STR);
44
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020045 printf (" (JTAG ID %08lx)", *(vu_long *) (CONFIG_SYS_MBAR + 0x50));
wdenk983fda82004-10-28 00:09:35 +000046
47 printf (" at %s MHz\n", strmhz (buf, clock));
48
49 return 0;
50}
51
52/* ------------------------------------------------------------------------- */
53
54int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
55{
56 volatile gptmr8220_t *gptmr = (volatile gptmr8220_t *) MMAP_GPTMR;
57 ulong msr;
58
59 /* Interrupts and MMU off */
60 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
61
62 msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
63 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
64
65 /* Charge the watchdog timer */
66 gptmr->Prescl = 10;
67 gptmr->Count = 1;
68
69 gptmr->Mode = GPT_TMS_SGPIO;
70
71 gptmr->Control = GPT_CTRL_WDEN | GPT_CTRL_CE;
72
73 return 1;
74}
75
76/* ------------------------------------------------------------------------- */
77
78/*
79 * Get timebase clock frequency (like cpu_clk in Hz)
80 *
81 */
82unsigned long get_tbclk (void)
83{
wdenk983fda82004-10-28 00:09:35 +000084 ulong tbclk;
85
86 tbclk = (gd->bus_clk + 3L) / 4L;
87
88 return (tbclk);
89}
90
91/* ------------------------------------------------------------------------- */