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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Jason Jincf8ddac2014-03-19 10:47:56 +08002/*
3 * Copyright 2014 Freescale Semiconductor, Inc.
4 * Author: Priyanka Jain <Priyanka.Jain@freescale.com>
Jason Jincf8ddac2014-03-19 10:47:56 +08005 */
6
7#include <asm/io.h>
8#include <common.h>
9#include <command.h>
10#include <fsl_diu_fb.h>
11#include <linux/ctype.h>
12#include <video_fb.h>
13
14#include "../common/diu_ch7301.h"
15
16#include "cpld.h"
17#include "t104xrdb.h"
18
19/*
20 * DIU Area Descriptor
21 *
22 * Note that we need to byte-swap the value before it's written to the AD
23 * register. So even though the registers don't look like they're in the same
24 * bit positions as they are on the MPC8610, the same value is written to the
25 * AD register on the MPC8610 and on the P1022.
26 */
27#define AD_BYTE_F 0x10000000
28#define AD_ALPHA_C_SHIFT 25
29#define AD_BLUE_C_SHIFT 23
30#define AD_GREEN_C_SHIFT 21
31#define AD_RED_C_SHIFT 19
32#define AD_PIXEL_S_SHIFT 16
33#define AD_COMP_3_SHIFT 12
34#define AD_COMP_2_SHIFT 8
35#define AD_COMP_1_SHIFT 4
36#define AD_COMP_0_SHIFT 0
37
38void diu_set_pixel_clock(unsigned int pixclock)
39{
40 unsigned long speed_ccb, temp;
41 u32 pixval;
42 int ret;
43
44 speed_ccb = get_bus_freq(0);
45 temp = 1000000000 / pixclock;
46 temp *= 1000;
47 pixval = speed_ccb / temp;
48
49 /* Program HDMI encoder */
50 ret = diu_set_dvi_encoder(temp);
51 if (ret) {
52 puts("Failed to set DVI encoder\n");
53 return;
54 }
55
56 /* Program pixel clock */
57 out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR,
58 ((pixval << PXCK_BITS_START) & PXCK_MASK));
59
60 /* enable clock*/
61 out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR, PXCKEN_MASK |
62 ((pixval << PXCK_BITS_START) & PXCK_MASK));
63}
64
65int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
66{
67 u32 pixel_format;
68 u8 sw;
69
70 /*Configure Display ouput port as HDMI*/
71 sw = CPLD_READ(sfp_ctl_status);
72 CPLD_WRITE(sfp_ctl_status , sw & ~(CPLD_DIU_SEL_DFP));
73
74 pixel_format = cpu_to_le32(AD_BYTE_F | (3 << AD_ALPHA_C_SHIFT) |
75 (0 << AD_BLUE_C_SHIFT) | (1 << AD_GREEN_C_SHIFT) |
76 (2 << AD_RED_C_SHIFT) | (8 << AD_COMP_3_SHIFT) |
77 (8 << AD_COMP_2_SHIFT) | (8 << AD_COMP_1_SHIFT) |
78 (8 << AD_COMP_0_SHIFT) | (3 << AD_PIXEL_S_SHIFT));
79
80 printf("DIU: Switching to monitor DVI @ %ux%u\n", xres, yres);
81
82 return fsl_diu_init(xres, yres, pixel_format, 0);
83}