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Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +01001/*
2 * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
3 *
4 * Developed for DENX Software Engineering GmbH
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +01007 */
8
9#include <common.h>
10
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010011/* This test verifies if the reason of last reset was an abnormal voltage
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010012 * condition, than it performs watchdog test, measuing time required to
13 * trigger watchdog reset.
14 */
15
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010016#include <post.h>
17
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020018#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010019
20#include <watchdog.h>
Stefan Roese09887762010-09-16 14:30:37 +020021#include <asm/ppc4xx-gpio.h>
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010022#include <asm/io.h>
23
24static uint watchdog_magic_read(void)
25{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020026 return in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
27 CONFIG_SYS_WATCHDOG_MAGIC_MASK;
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010028}
29
30static void watchdog_magic_write(uint value)
31{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020032 out_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR, value |
33 (in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
34 ~CONFIG_SYS_WATCHDOG_MAGIC_MASK));
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010035}
36
37int sysmon1_post_test(int flags)
38{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039 if (gpio_read_in_bit(CONFIG_SYS_GPIO_SYSMON_STATUS) == 0) {
Sascha Laue3e4615a2008-04-01 15:13:03 +020040 /*
41 * 3.1. GPIO62 is low
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010042 * Assuming system voltage failure.
43 */
Sascha Lauef14ae412010-08-19 09:38:56 +020044 post_log("sysmon1 Abnormal voltage detected (GPIO62)\n");
45 post_log("POST sysmon1 FAILED\n");
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010046 return 1;
Sascha Lauef14ae412010-08-19 09:38:56 +020047 } else {
48 post_log("sysmon1 PASSED\n");
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010049 }
50
51 return 0;
52}
53
54int lwmon5_watchdog_post_test(int flags)
55{
56 /* On each reset scratch register 1 should be tested,
57 * but first test GPIO62:
58 */
59 if (!(flags & POST_MANUAL) && sysmon1_post_test(flags)) {
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010060 /* 3.1. GPIO62 is low
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010061 * Assuming system voltage failure.
62 */
63 /* 3.1.1. Set scratch register 1 to 0x0000xxxx */
64 watchdog_magic_write(0);
65 /* 3.1.2. Mark test as failed due to voltage?! */
66 return 1;
67 }
68
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020069 if (watchdog_magic_read() != CONFIG_SYS_WATCHDOG_MAGIC) {
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010070 /* 3.2. Scratch register 1 differs from magic value 0x1248xxxx
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010071 * Assuming PowerOn
72 */
73 int ints;
74 ulong base;
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010075 ulong time;
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010076
77 /* 3.2.1. Set magic value to scratch register */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078 watchdog_magic_write(CONFIG_SYS_WATCHDOG_MAGIC);
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010079
80 ints = disable_interrupts ();
81 /* 3.2.2. strobe watchdog once */
82 WATCHDOG_RESET();
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020083 out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, 0);
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010084 /* 3.2.3. save time of strobe in scratch register 2 */
85 base = post_time_ms (0);
86
87 /* 3.2.4. Wait for 150 ms (enough for reset to happen) */
88 while ((time = post_time_ms (base)) < 150)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020089 out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, time);
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010090 if (ints)
91 enable_interrupts ();
92
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010093 /* 3.2.5. Reset didn't happen. - Set 0x0000xxxx
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +010094 * into scratch register 1
95 */
96 watchdog_magic_write(0);
97 /* 3.2.6. Mark test as failed. */
98 post_log("hw watchdog time : %u ms, failed ", time);
99 return 2;
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100100 } else {
101 /* 3.3. Scratch register matches magic value 0x1248xxxx
102 * Assume this is watchdog-initiated reset
103 */
104 ulong time;
105 /* 3.3.1. So, the test succeed, save measured time to syslog. */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106 time = in_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR);
Sascha Lauef14ae412010-08-19 09:38:56 +0200107 if (time > 90 ) { /* ms*/
108 post_log("hw watchdog time : %u ms, passed ", time);
109 /* 3.3.2. Set scratch register 1 to 0x0000xxxx */
110 watchdog_magic_write(0);
111 return 0;
112 } else {
113 /*test minimum watchdogtime */
114 post_log("hw watchdog time : %u ms, failed ", time);
115 return 2;
116 }
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +0100117 }
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100118 return -1;
Wolfgang Denk81a0ac62008-03-20 22:01:38 +0100119}
Yuri Tikhonov8f15d4a2008-02-04 14:10:42 +0100120
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200121#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */