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Mike Frysingerd4d77302008-02-04 19:26:55 -05001/*
Mike Frysingerf348ab82009-04-24 17:22:40 -04002 * config-pre.h - common defines for Blackfin boards in config.h
Mike Frysingerd4d77302008-02-04 19:26:55 -05003 *
Mike Frysingerf348ab82009-04-24 17:22:40 -04004 * Copyright (c) 2007-2009 Analog Devices Inc.
Mike Frysingerd4d77302008-02-04 19:26:55 -05005 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#ifndef __ASM_BLACKFIN_CONFIG_PRE_H__
10#define __ASM_BLACKFIN_CONFIG_PRE_H__
11
12/* Misc helper functions */
13#define XMK_STR(x) #x
14#define MK_STR(x) XMK_STR(x)
15#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
16
Mike Frysinger30fb9d22008-08-07 13:17:03 -040017/* Bootmode defines -- your config needs to select this via CONFIG_BFIN_BOOT_MODE.
Mike Frysingerd4d77302008-02-04 19:26:55 -050018 * Depending on your cpu, some of these may not be valid, check your HRM.
19 * The actual values here are meaningless as long as they're unique.
20 */
21#define BFIN_BOOT_BYPASS 1 /* bypass bootrom */
22#define BFIN_BOOT_PARA 2 /* boot ldr out of parallel flash */
23#define BFIN_BOOT_SPI_MASTER 3 /* boot ldr out of serial flash */
24#define BFIN_BOOT_SPI_SLAVE 4 /* boot ldr as spi slave */
25#define BFIN_BOOT_TWI_MASTER 5 /* boot ldr over twi device */
26#define BFIN_BOOT_TWI_SLAVE 6 /* boot ldr over twi slave */
27#define BFIN_BOOT_UART 7 /* boot ldr over uart */
28#define BFIN_BOOT_IDLE 8 /* do nothing, just idle */
29#define BFIN_BOOT_FIFO 9 /* boot ldr out of FIFO */
30#define BFIN_BOOT_MEM 10 /* boot ldr out of memory (warmboot) */
31#define BFIN_BOOT_16HOST_DMA 11 /* boot ldr from 16-bit host dma */
32#define BFIN_BOOT_8HOST_DMA 12 /* boot ldr from 8-bit host dma */
Mike Frysinger30fb9d22008-08-07 13:17:03 -040033#define BFIN_BOOT_NAND 13 /* boot ldr from nand flash */
Mike Frysingerd4d77302008-02-04 19:26:55 -050034
Mike Frysingerfc68f9f2009-01-06 06:16:19 -050035#ifndef __ASSEMBLY__
36static inline const char *get_bfin_boot_mode(int bfin_boot)
37{
38 switch (bfin_boot) {
39 case BFIN_BOOT_BYPASS: return "bypass";
40 case BFIN_BOOT_PARA: return "parallel flash";
41 case BFIN_BOOT_SPI_MASTER: return "spi flash";
42 case BFIN_BOOT_SPI_SLAVE: return "spi slave";
43 case BFIN_BOOT_TWI_MASTER: return "i2c flash";
44 case BFIN_BOOT_TWI_SLAVE: return "i2c slave";
45 case BFIN_BOOT_UART: return "uart";
46 case BFIN_BOOT_IDLE: return "idle";
47 case BFIN_BOOT_FIFO: return "fifo";
48 case BFIN_BOOT_MEM: return "memory";
49 case BFIN_BOOT_16HOST_DMA: return "16bit dma";
50 case BFIN_BOOT_8HOST_DMA: return "8bit dma";
51 case BFIN_BOOT_NAND: return "nand flash";
52 default: return "INVALID";
53 }
54}
55#endif
56
Mike Frysinger02778f22009-04-24 23:39:41 -040057/* Most bootroms allow for EVT1 redirection */
Mike Frysinger21573592009-05-26 02:51:57 -040058#if ((defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__)) \
Mike Frysinger02778f22009-04-24 23:39:41 -040059 && __SILICON_REVISION__ < 3) || defined(__ADSPBF561__)
60# undef CONFIG_BFIN_BOOTROM_USES_EVT1
61#else
62# define CONFIG_BFIN_BOOTROM_USES_EVT1
63#endif
64
Mike Frysinger4b7e3d02009-01-13 11:00:29 -050065/* Define the default SPI CS used when booting out of SPI */
66#if defined(__ADSPBF531__) || defined(__ADSPBF532__) || defined(__ADSPBF533__) || \
67 defined(__ADSPBF538__) || defined(__ADSPBF539__) || defined(__ADSPBF561__) || \
68 defined(__ADSPBF51x__)
69# define BFIN_BOOT_SPI_SSEL 2
70#else
71# define BFIN_BOOT_SPI_SSEL 1
72#endif
73
Mike Frysinger55fed6f2010-09-20 17:54:09 -040074/* Define to get a GPIO CS with the Blackfin SPI controller */
75#define MAX_CTRL_CS 8
76
Mike Frysinger459c41a2009-11-03 15:53:12 -050077/* There is no Blackfin/NetBSD port */
78#undef CONFIG_BOOTM_NETBSD
79
Mike Frysingera52ad4f2009-11-30 13:51:24 -050080/* We rarely use interrupts, so favor throughput over latency */
81#define CONFIG_BFIN_INS_LOWOVERHEAD
82
Mike Frysingerd4d77302008-02-04 19:26:55 -050083#endif