| Ashish Kumar | 6d9b82d | 2017-08-31 16:12:53 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * NXP ls1088a SOC common device tree source |
| 3 | * |
| 4 | * Copyright 2017 NXP |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | / { |
| 10 | compatible = "fsl,ls1088a"; |
| 11 | interrupt-parent = <&gic>; |
| 12 | #address-cells = <2>; |
| 13 | #size-cells = <2>; |
| 14 | |
| 15 | memory@80000000 { |
| 16 | device_type = "memory"; |
| 17 | reg = <0x00000000 0x80000000 0 0x80000000>; |
| 18 | /* DRAM space - 1, size : 2 GB DRAM */ |
| 19 | }; |
| 20 | |
| 21 | gic: interrupt-controller@6000000 { |
| 22 | compatible = "arm,gic-v3"; |
| 23 | reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */ |
| 24 | <0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */ |
| 25 | #interrupt-cells = <3>; |
| 26 | interrupt-controller; |
| 27 | interrupts = <1 9 0x4>; |
| 28 | }; |
| 29 | |
| 30 | timer { |
| 31 | compatible = "arm,armv8-timer"; |
| 32 | interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */ |
| 33 | <1 14 0x8>, /* Physical Non-Secure PPI, active-low */ |
| 34 | <1 11 0x8>, /* Virtual PPI, active-low */ |
| 35 | <1 10 0x8>; /* Hypervisor PPI, active-low */ |
| 36 | }; |
| 37 | |
| 38 | serial0: serial@21c0500 { |
| 39 | device_type = "serial"; |
| 40 | compatible = "fsl,ns16550", "ns16550a"; |
| 41 | reg = <0x0 0x21c0500 0x0 0x100>; |
| 42 | clock-frequency = <0>; /* Updated by bootloader */ |
| 43 | interrupts = <0 32 0x1>; /* edge triggered */ |
| 44 | }; |
| 45 | |
| 46 | serial1: serial@21c0600 { |
| 47 | device_type = "serial"; |
| 48 | compatible = "fsl,ns16550", "ns16550a"; |
| 49 | reg = <0x0 0x21c0600 0x0 0x100>; |
| 50 | clock-frequency = <0>; /* Updated by bootloader */ |
| 51 | interrupts = <0 32 0x1>; /* edge triggered */ |
| 52 | }; |
| 53 | |
| 54 | fsl_mc: fsl-mc@80c000000 { |
| 55 | compatible = "fsl,qoriq-mc"; |
| 56 | reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ |
| 57 | <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ |
| 58 | }; |
| 59 | |
| 60 | dspi: dspi@2100000 { |
| 61 | compatible = "fsl,vf610-dspi"; |
| 62 | #address-cells = <1>; |
| 63 | #size-cells = <0>; |
| 64 | reg = <0x0 0x2100000 0x0 0x10000>; |
| 65 | interrupts = <0 26 0x4>; /* Level high type */ |
| 66 | num-cs = <6>; |
| 67 | }; |
| 68 | |
| 69 | qspi: quadspi@1550000 { |
| 70 | compatible = "fsl,vf610-qspi"; |
| 71 | #address-cells = <1>; |
| 72 | #size-cells = <0>; |
| 73 | reg = <0x0 0x20c0000 0x0 0x10000>, |
| 74 | <0x0 0x20000000 0x0 0x10000000>; |
| 75 | reg-names = "QuadSPI", "QuadSPI-memory"; |
| 76 | num-cs = <4>; |
| 77 | }; |
| 78 | }; |