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Heiko Schocher7254d922015-05-18 13:32:31 +02001/*
2 * (C) Copyright 2015
3 * (C) Copyright 2014
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * Copyright (C) 2012 Freescale Semiconductor, Inc.
8 *
9 * Configuration settings for the Freescale i.MX6Q SabreSD board.
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13#ifndef __ARISTAINETOS_COMMON_CONFIG_H
14#define __ARISTAINETOS_COMMON_CONFIG_H
15
Heiko Schocher7254d922015-05-18 13:32:31 +020016#include "mx6_common.h"
Heiko Schocher7254d922015-05-18 13:32:31 +020017
Heiko Schocher7254d922015-05-18 13:32:31 +020018#define CONFIG_MACH_TYPE 4501
19#define CONFIG_MMCROOT "/dev/mmcblk0p1"
Heiko Schocher7254d922015-05-18 13:32:31 +020020
Heiko Schocher7254d922015-05-18 13:32:31 +020021/* Size of malloc() pool */
22#define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
23
Heiko Schocher7254d922015-05-18 13:32:31 +020024#define CONFIG_MXC_UART
25
Heiko Schocher7254d922015-05-18 13:32:31 +020026/* MMC Configs */
Heiko Schocher7254d922015-05-18 13:32:31 +020027#define CONFIG_SYS_FSL_ESDHC_ADDR 0
28
Heiko Schocher7254d922015-05-18 13:32:31 +020029#define CONFIG_FEC_MXC
30#define CONFIG_MII
31#define IMX_FEC_BASE ENET_BASE_ADDR
32#define CONFIG_ETHPRIME "FEC"
33#define CONFIG_FEC_MXC_PHYADDR 0
34
35#define CONFIG_PHYLIB
36#define CONFIG_PHY_MICREL
37
Heiko Schocher7254d922015-05-18 13:32:31 +020038#define CONFIG_SPI_FLASH_MTD
Heiko Schocher7254d922015-05-18 13:32:31 +020039#define CONFIG_MXC_SPI
Heiko Schocher7254d922015-05-18 13:32:31 +020040#define CONFIG_SF_DEFAULT_SPEED 20000000
41#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
42#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
43
Heiko Schocher7254d922015-05-18 13:32:31 +020044/* Command definition */
Heiko Schocher7254d922015-05-18 13:32:31 +020045#define CONFIG_CMD_BMODE
Heiko Schocher7254d922015-05-18 13:32:31 +020046
Heiko Schocher7254d922015-05-18 13:32:31 +020047#define CONFIG_EXTRA_ENV_SETTINGS \
48 "script=u-boot.scr\0" \
49 "fit_file=/boot/system.itb\0" \
50 "loadaddr=0x12000000\0" \
51 "fit_addr_r=0x14000000\0" \
52 "uboot=/boot/u-boot.imx\0" \
53 "uboot_sz=d0000\0" \
54 "rescue_sys_addr=f0000\0" \
55 "rescue_sys_length=f10000\0" \
56 "panel=lb07wv8\0" \
57 "splashpos=m,m\0" \
Simon Glass12ca05a2016-10-17 20:12:39 -060058 "console=" CONSOLE_DEV "\0" \
Heiko Schocher7254d922015-05-18 13:32:31 +020059 "fdt_high=0xffffffff\0" \
60 "initrd_high=0xffffffff\0" \
61 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
62 "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
63 "default ${board_type}\0" \
64 "get_env=mw ${loadaddr} 0 0x20000;" \
65 "mmc rescan;" \
66 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
67 "env import -t ${loadaddr}\0" \
68 "default_env=mw ${loadaddr} 0 0x20000;" \
69 "env export -t ${loadaddr} serial# ethaddr eth1addr " \
70 "board_type panel;" \
71 "env default -a;" \
72 "env import -t ${loadaddr}\0" \
73 "loadbootscript=" \
74 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
75 "bootscript=echo Running bootscript from mmc ...; " \
76 "source\0" \
77 "mmcpart=1\0" \
78 "mmcdev=0\0" \
79 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
80 "mmcargs=setenv bootargs console=${console},${baudrate} " \
81 "root=${mmcroot}\0" \
82 "mmcboot=echo Booting from mmc ...; " \
83 "run mmcargs addmtd addmisc set_fit_default;" \
84 "bootm ${fit_addr_r}\0" \
85 "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
86 "${fit_file}\0" \
87 "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
88 "${uboot}\0" \
89 "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
90 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
91 "setexpr uboot_maxsize ${uboot_sz} - 400;" \
92 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
93 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
94 "sf write ${loadaddr} 400 ${filesize};" \
95 "sf read ${cmp_buf} 400 ${uboot_sz};" \
96 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
97 "ubiboot=echo Booting from ubi ...; " \
98 "run ubiargs addmtd addmisc set_fit_default;" \
99 "bootm ${fit_addr_r}\0" \
Heiko Schocher7254d922015-05-18 13:32:31 +0200100 "rescueargs=setenv bootargs console=${console},${baudrate} " \
101 "root=/dev/ram rw\0 " \
102 "rescueboot=echo Booting rescue system from NOR ...; " \
103 "run rescueargs addmtd addmisc set_fit_default;" \
104 "bootm ${fit_addr_r}\0" \
105 "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
106 "${rescue_sys_length}; imi ${fit_addr_r}\0" \
107 CONFIG_EXTRA_ENV_BOARD_SETTINGS
108
109#define CONFIG_BOOTCOMMAND \
110 "mmc dev ${mmcdev};" \
111 "if mmc rescan; then " \
112 "if run loadbootscript; then " \
113 "run bootscript; " \
114 "else " \
115 "if run mmc_load_fit; then " \
116 "run mmcboot; " \
117 "else " \
118 "if run ubifs_load_fit; then " \
119 "run ubiboot; " \
120 "else " \
121 "if run rescue_load_fit; then " \
122 "run rescueboot; " \
123 "else " \
124 "echo RESCUE SYSTEM BOOT " \
125 "FAILURE;" \
126 "fi; " \
127 "fi; " \
128 "fi; " \
129 "fi; " \
130 "else " \
131 "if run ubifs_load_fit; then " \
132 "run ubiboot; " \
133 "else " \
134 "if run rescue_load_fit; then " \
135 "run rescueboot; " \
136 "else " \
137 "echo RESCUE SYSTEM BOOT FAILURE;" \
138 "fi; " \
139 "fi; " \
140 "fi"
141
142#define CONFIG_ARP_TIMEOUT 200UL
143
Heiko Schocher7254d922015-05-18 13:32:31 +0200144/* Print Buffer Size */
145#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Heiko Schocher7254d922015-05-18 13:32:31 +0200146
147#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
148#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
149#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
150
Heiko Schocher7254d922015-05-18 13:32:31 +0200151/* Physical Memory Map */
152#define CONFIG_NR_DRAM_BANKS 1
153#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
154
155#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
156#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
157#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
158
159#define CONFIG_SYS_INIT_SP_OFFSET \
160 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
161#define CONFIG_SYS_INIT_SP_ADDR \
162 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
163
Peter Robinson056845c2015-05-22 17:30:45 +0100164/* Environment organization */
Heiko Schocher7254d922015-05-18 13:32:31 +0200165#define CONFIG_ENV_SIZE (12 * 1024)
166#define CONFIG_ENV_IS_IN_SPI_FLASH
167#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
168#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
169#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
170#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
171#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
172#define CONFIG_ENV_SECT_SIZE (0x010000)
173#define CONFIG_ENV_OFFSET (0x0d0000)
174#define CONFIG_ENV_OFFSET_REDUND (0x0e0000)
175
Heiko Schocher7254d922015-05-18 13:32:31 +0200176#define CONFIG_SYS_FSL_USDHC_NUM 2
177
178/* I2C */
Heiko Schocher7254d922015-05-18 13:32:31 +0200179#define CONFIG_SYS_I2C
180#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +0200181#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
182#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Heiko Schocher7254d922015-05-18 13:32:31 +0200183#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
184#define CONFIG_SYS_I2C_SPEED 100000
185#define CONFIG_SYS_I2C_SLAVE 0x7f
186#define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
187
Heiko Schocher7254d922015-05-18 13:32:31 +0200188/* NAND stuff */
189#define CONFIG_CMD_NAND
190#define CONFIG_CMD_NAND_TRIMFFS
191#define CONFIG_NAND_MXS
192#define CONFIG_SYS_MAX_NAND_DEVICE 1
193#define CONFIG_SYS_NAND_BASE 0x40000000
194#define CONFIG_SYS_NAND_5_ADDR_CYCLE
195#define CONFIG_SYS_NAND_ONFI_DETECTION
196
197/* DMA stuff, needed for GPMI/MXS NAND support */
198#define CONFIG_APBH_DMA
199#define CONFIG_APBH_DMA_BURST
200#define CONFIG_APBH_DMA_BURST8
201
202/* RTC */
203#define CONFIG_SYS_I2C_RTC_ADDR 0x68
204#define CONFIG_SYS_RTC_BUS_NUM 2
205#define CONFIG_RTC_M41T11
206#define CONFIG_CMD_DATE
207
208/* USB Configs */
Heiko Schocher7254d922015-05-18 13:32:31 +0200209#define CONFIG_USB_EHCI
210#define CONFIG_USB_EHCI_MX6
Heiko Schocher7254d922015-05-18 13:32:31 +0200211#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
212#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
213#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
214#define CONFIG_MXC_USB_FLAGS 0
215
216/* UBI support */
Peter Robinsona380ce62015-05-22 17:30:51 +0100217#define CONFIG_LZO
Heiko Schocher7254d922015-05-18 13:32:31 +0200218#define CONFIG_CMD_MTDPARTS
219#define CONFIG_MTD_PARTITIONS
220#define CONFIG_MTD_DEVICE
221#define CONFIG_RBTREE
Heiko Schocher7254d922015-05-18 13:32:31 +0200222#define CONFIG_CMD_UBIFS
223
Heiko Schocher7254d922015-05-18 13:32:31 +0200224#define CONFIG_HW_WATCHDOG
225#define CONFIG_IMX_WATCHDOG
226
Heiko Schocher7254d922015-05-18 13:32:31 +0200227/* Framebuffer */
Heiko Schocher7254d922015-05-18 13:32:31 +0200228#define CONFIG_VIDEO_IPUV3
229/* check this console not needed, after test remove it */
Heiko Schocher7254d922015-05-18 13:32:31 +0200230#define CONFIG_VIDEO_BMP_RLE8
231#define CONFIG_SPLASH_SCREEN
232#define CONFIG_SPLASH_SCREEN_ALIGN
233#define CONFIG_BMP_16BPP
234#define CONFIG_VIDEO_LOGO
235#define CONFIG_VIDEO_BMP_LOGO
236#define CONFIG_IPUV3_CLK 198000000
237#define CONFIG_IMX_VIDEO_SKIP
238
239#define CONFIG_CMD_BMP
240
241#define CONFIG_PWM_IMX
242#define CONFIG_IMX6_PWM_PER_CLK 66000000
243
244#endif /* __ARISTAINETOS_COMMON_CONFIG_H */