| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 1 | /* |
| 2 | * include/configs/gose.h |
| 3 | * |
| 4 | * Copyright (C) 2014 Renesas Electronics Corporation |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0 |
| 7 | */ |
| 8 | |
| 9 | #ifndef __GOSE_H |
| 10 | #define __GOSE_H |
| 11 | |
| 12 | #undef DEBUG |
| 13 | #define CONFIG_R8A7793 |
| Nobuhiro Iwamatsu | 1cc95f6 | 2015-10-10 05:58:28 +0900 | [diff] [blame] | 14 | #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Gose" |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 15 | |
| Nobuhiro Iwamatsu | 5ca6dfe | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 16 | #include "rcar-gen2-common.h" |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 17 | |
| Nobuhiro Iwamatsu | 1cc95f6 | 2015-10-10 05:58:28 +0900 | [diff] [blame] | 18 | #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 19 | #define CONFIG_SYS_TEXT_BASE 0x70000000 |
| 20 | #else |
| 21 | #define CONFIG_SYS_TEXT_BASE 0xE6304000 |
| 22 | #endif |
| 23 | |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 24 | /* STACK */ |
| Nobuhiro Iwamatsu | 1cc95f6 | 2015-10-10 05:58:28 +0900 | [diff] [blame] | 25 | #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 26 | #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC |
| 27 | #else |
| 28 | #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC |
| 29 | #endif |
| 30 | |
| 31 | #define STACK_AREA_SIZE 0xC000 |
| 32 | #define LOW_LEVEL_MERAM_STACK \ |
| 33 | (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) |
| 34 | |
| 35 | /* MEMORY */ |
| Nobuhiro Iwamatsu | 5ca6dfe | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 36 | #define RCAR_GEN2_SDRAM_BASE 0x40000000 |
| 37 | #define RCAR_GEN2_SDRAM_SIZE 0x40000000 |
| 38 | #define RCAR_GEN2_UBOOT_SDRAM_SIZE 0x20000000 |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 39 | |
| 40 | /* SCIF */ |
| 41 | #define CONFIG_SCIF_CONSOLE |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 42 | |
| 43 | /* FLASH */ |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 44 | #define CONFIG_SPI |
| 45 | #define CONFIG_SH_QSPI |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 46 | |
| Nobuhiro Iwamatsu | f026124 | 2014-11-06 15:42:24 +0900 | [diff] [blame] | 47 | /* SH Ether */ |
| Nobuhiro Iwamatsu | f026124 | 2014-11-06 15:42:24 +0900 | [diff] [blame] | 48 | #define CONFIG_SH_ETHER |
| 49 | #define CONFIG_SH_ETHER_USE_PORT 0 |
| 50 | #define CONFIG_SH_ETHER_PHY_ADDR 0x1 |
| 51 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII |
| 52 | #define CONFIG_SH_ETHER_CACHE_WRITEBACK |
| 53 | #define CONFIG_SH_ETHER_CACHE_INVALIDATE |
| 54 | #define CONFIG_PHYLIB |
| 55 | #define CONFIG_PHY_MICREL |
| 56 | #define CONFIG_BITBANGMII |
| 57 | #define CONFIG_BITBANGMII_MULTI |
| 58 | #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 |
| 59 | |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 60 | /* Board Clock */ |
| 61 | #define RMOBILE_XTAL_CLK 20000000u |
| 62 | #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK |
| 63 | #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 64 | #define CONFIG_SYS_TMU_CLK_DIV 4 |
| 65 | |
| 66 | /* I2C */ |
| 67 | #define CONFIG_SYS_I2C |
| 68 | #define CONFIG_SYS_I2C_SH |
| 69 | #define CONFIG_SYS_I2C_SLAVE 0x7F |
| 70 | #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 71 | #define CONFIG_SYS_I2C_SH_SPEED0 400000 |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 72 | #define CONFIG_SYS_I2C_SH_SPEED1 400000 |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 73 | #define CONFIG_SYS_I2C_SH_SPEED2 400000 |
| 74 | #define CONFIG_SH_I2C_DATA_HIGH 4 |
| 75 | #define CONFIG_SH_I2C_DATA_LOW 5 |
| 76 | #define CONFIG_SH_I2C_CLOCK 10000000 |
| 77 | |
| 78 | #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ |
| 79 | |
| Nobuhiro Iwamatsu | d3ee73f | 2014-11-06 15:42:25 +0900 | [diff] [blame] | 80 | /* USB */ |
| Nobuhiro Iwamatsu | d3ee73f | 2014-11-06 15:42:25 +0900 | [diff] [blame] | 81 | #define CONFIG_USB_EHCI |
| 82 | #define CONFIG_USB_EHCI_RMOBILE |
| 83 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| 84 | |
| Nobuhiro Iwamatsu | 8e2e588 | 2014-12-02 16:52:24 +0900 | [diff] [blame] | 85 | /* Module stop status bits */ |
| 86 | /* INTC-RT */ |
| 87 | #define CONFIG_SMSTP0_ENA 0x00400000 |
| 88 | /* MSIF */ |
| 89 | #define CONFIG_SMSTP2_ENA 0x00002000 |
| 90 | /* INTC-SYS, IRQC */ |
| 91 | #define CONFIG_SMSTP4_ENA 0x00000180 |
| 92 | /* SCIF0 */ |
| 93 | #define CONFIG_SMSTP7_ENA 0x00200000 |
| 94 | |
| Nobuhiro Iwamatsu | e2abab6 | 2014-11-12 11:29:39 +0900 | [diff] [blame] | 95 | /* SDHI */ |
| Nobuhiro Iwamatsu | e2abab6 | 2014-11-12 11:29:39 +0900 | [diff] [blame] | 96 | #define CONFIG_SH_SDHI_FREQ 97500000 |
| 97 | |
| Nobuhiro Iwamatsu | 6a994e5 | 2014-11-06 15:39:28 +0900 | [diff] [blame] | 98 | #endif /* __GOSE_H */ |