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Dinh Nguyen77754402012-10-04 06:46:02 +00001/*
Pavel Machek5095ee02014-09-08 14:08:45 +02002 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
Dinh Nguyen77754402012-10-04 06:46:02 +00003 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Dinh Nguyen77754402012-10-04 06:46:02 +00005 */
Pavel Machek5095ee02014-09-08 14:08:45 +02006#ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
7#define __CONFIG_SOCFPGA_CYCLONE5_H__
Dinh Nguyen77754402012-10-04 06:46:02 +00008
Dinh Nguyen871c24b2015-11-23 17:27:17 -06009#include <asm/arch/base_addr_ac5.h>
Dinh Nguyen77754402012-10-04 06:46:02 +000010
Marek Vasut47f9b4e2014-09-08 14:08:45 +020011#define CONFIG_HW_WATCHDOG
12
Pavel Machek5095ee02014-09-08 14:08:45 +020013/* Memory configurations */
Marek Vasut47f9b4e2014-09-08 14:08:45 +020014#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
Dinh Nguyen77754402012-10-04 06:46:02 +000015
Marek Vasut47f9b4e2014-09-08 14:08:45 +020016/* Booting Linux */
Marek Vasut4c6d8b92015-07-22 06:18:19 +020017#define CONFIG_LOADADDR 0x01000000
Marek Vasut47f9b4e2014-09-08 14:08:45 +020018#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
19
Pavel Machek5095ee02014-09-08 14:08:45 +020020/* Ethernet on SoC (EMAC) */
21#if defined(CONFIG_CMD_NET)
Marek Vasut47f9b4e2014-09-08 14:08:45 +020022#define CONFIG_PHY_MICREL
23#define CONFIG_PHY_MICREL_KSZ9021
Chin Liang See97ce2742014-09-19 05:33:19 -050024#endif
Dinh Nguyen77754402012-10-04 06:46:02 +000025
Dinh Nguyen68a3e322015-09-23 15:38:01 -050026#define CONFIG_ENV_IS_IN_MMC
Dinh Nguyen68a3e322015-09-23 15:38:01 -050027
Pavel Machek5095ee02014-09-08 14:08:45 +020028/* The rest of the configuration is shared */
29#include <configs/socfpga_common.h>
Dinh Nguyen77754402012-10-04 06:46:02 +000030
Pavel Machek5095ee02014-09-08 14:08:45 +020031#endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */