Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Soeren Moch <smoch@web.de> |
| 3 | * |
| 4 | * Configuration settings for the TBS2910 MatrixARM board. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #ifndef __TBS2910_CONFIG_H |
| 10 | #define __TBS2910_CONFIG_H |
| 11 | |
| 12 | #include "mx6_common.h" |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 13 | |
| 14 | /* General configuration */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 15 | |
| 16 | #define CONFIG_MACH_TYPE 3980 |
| 17 | |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 18 | #define CONFIG_SYS_HZ 1000 |
| 19 | |
Adrian Alonso | 1368f99 | 2015-09-02 13:54:13 -0500 | [diff] [blame] | 20 | #define CONFIG_IMX_THERMAL |
Soeren Moch | fbd18aa | 2015-05-29 20:32:41 +0200 | [diff] [blame] | 21 | |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 22 | /* Physical Memory Map */ |
| 23 | #define CONFIG_NR_DRAM_BANKS 1 |
| 24 | #define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR |
| 25 | |
| 26 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 27 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 28 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 29 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 30 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 31 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 32 | |
| 33 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024) |
| 34 | |
| 35 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 36 | #define CONFIG_SYS_MEMTEST_END \ |
| 37 | (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024) |
| 38 | |
Soeren Moch | 29138c6 | 2016-09-21 13:16:21 +0200 | [diff] [blame] | 39 | #define CONFIG_SYS_BOOTMAPSZ 0x10000000 |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 40 | |
| 41 | /* Serial console */ |
| 42 | #define CONFIG_MXC_UART |
| 43 | #define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 44 | |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 45 | #define CONFIG_CONS_INDEX 1 |
| 46 | |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 47 | /* Filesystems / image support */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 48 | |
| 49 | /* MMC */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 50 | #define CONFIG_SYS_FSL_USDHC_NUM 3 |
| 51 | #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR |
Soeren Moch | 9927d60 | 2015-05-05 23:09:21 +0200 | [diff] [blame] | 52 | #define CONFIG_SUPPORT_EMMC_BOOT |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 53 | |
| 54 | /* Ethernet */ |
| 55 | #define CONFIG_FEC_MXC |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 56 | #define CONFIG_FEC_MXC |
| 57 | #define CONFIG_MII |
| 58 | #define IMX_FEC_BASE ENET_BASE_ADDR |
| 59 | #define CONFIG_FEC_XCV_TYPE RGMII |
| 60 | #define CONFIG_ETHPRIME "FEC" |
| 61 | #define CONFIG_FEC_MXC_PHYADDR 4 |
| 62 | #define CONFIG_PHYLIB |
| 63 | #define CONFIG_PHY_ATHEROS |
| 64 | |
| 65 | /* Framebuffer */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 66 | #ifdef CONFIG_VIDEO |
| 67 | #define CONFIG_VIDEO_IPUV3 |
| 68 | #define CONFIG_IPUV3_CLK 260000000 |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 69 | #define CONFIG_VIDEO_BMP_RLE8 |
| 70 | #define CONFIG_IMX_HDMI |
| 71 | #define CONFIG_IMX_VIDEO_SKIP |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 72 | #endif |
| 73 | |
| 74 | /* PCI */ |
| 75 | #define CONFIG_CMD_PCI |
| 76 | #ifdef CONFIG_CMD_PCI |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 77 | #define CONFIG_PCI_SCAN_SHOW |
| 78 | #define CONFIG_PCIE_IMX |
| 79 | #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) |
| 80 | #endif |
| 81 | |
| 82 | /* SATA */ |
| 83 | #define CONFIG_CMD_SATA |
| 84 | #ifdef CONFIG_CMD_SATA |
| 85 | #define CONFIG_DWC_AHSATA |
| 86 | #define CONFIG_SYS_SATA_MAX_DEVICE 1 |
| 87 | #define CONFIG_DWC_AHSATA_PORT_ID 0 |
| 88 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR |
| 89 | #define CONFIG_LBA48 |
| 90 | #define CONFIG_LIBATA |
| 91 | #endif |
| 92 | |
| 93 | /* USB */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 94 | #ifdef CONFIG_CMD_USB |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 95 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
Soeren Moch | d896276 | 2015-05-05 23:09:18 +0200 | [diff] [blame] | 96 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 97 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
Soeren Moch | 6628aa5 | 2015-02-26 19:50:02 +0100 | [diff] [blame] | 98 | #ifdef CONFIG_CMD_USB_MASS_STORAGE |
Soeren Moch | 6628aa5 | 2015-02-26 19:50:02 +0100 | [diff] [blame] | 99 | #define CONFIG_USBD_HS |
Paul Kocialkowski | 01acd6a | 2015-06-12 19:56:58 +0200 | [diff] [blame] | 100 | #define CONFIG_USB_FUNCTION_MASS_STORAGE |
Soeren Moch | 6628aa5 | 2015-02-26 19:50:02 +0100 | [diff] [blame] | 101 | #endif /* CONFIG_CMD_USB_MASS_STORAGE */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 102 | #ifdef CONFIG_USB_KEYBOARD |
Soeren Moch | daa12e3 | 2014-11-27 21:21:44 +0100 | [diff] [blame] | 103 | #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE |
Soeren Moch | 54ca183 | 2015-05-05 23:09:19 +0200 | [diff] [blame] | 104 | #define CONFIG_PREBOOT \ |
Soeren Moch | 8741a37 | 2016-07-27 16:07:16 +0200 | [diff] [blame] | 105 | "usb start; " \ |
Soeren Moch | 54ca183 | 2015-05-05 23:09:19 +0200 | [diff] [blame] | 106 | "if hdmidet; then " \ |
Soeren Moch | 8741a37 | 2016-07-27 16:07:16 +0200 | [diff] [blame] | 107 | "run set_con_hdmi; " \ |
Soeren Moch | 54ca183 | 2015-05-05 23:09:19 +0200 | [diff] [blame] | 108 | "else " \ |
| 109 | "run set_con_serial; " \ |
| 110 | "fi;" |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 111 | #endif /* CONFIG_USB_KEYBOARD */ |
| 112 | #endif /* CONFIG_CMD_USB */ |
| 113 | |
| 114 | /* RTC */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 115 | #ifdef CONFIG_CMD_DATE |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 116 | #define CONFIG_RTC_DS1307 |
| 117 | #define CONFIG_SYS_RTC_BUS_NUM 2 |
| 118 | #endif |
| 119 | |
| 120 | /* I2C */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 121 | #ifdef CONFIG_CMD_I2C |
| 122 | #define CONFIG_SYS_I2C |
| 123 | #define CONFIG_SYS_I2C_MXC |
Albert ARIBAUD \\(3ADEV\\) | 03544c6 | 2015-09-21 22:43:38 +0200 | [diff] [blame] | 124 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
| 125 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ |
York Sun | f8cb101 | 2015-03-20 10:20:40 -0700 | [diff] [blame] | 126 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 127 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 128 | #define CONFIG_I2C_EDID |
| 129 | #endif |
| 130 | |
Peter Robinson | 056845c | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 131 | /* Environment organization */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 132 | #define CONFIG_ENV_IS_IN_MMC |
Soeren Moch | a668436 | 2016-02-04 14:41:16 +0100 | [diff] [blame] | 133 | #define CONFIG_SYS_MMC_ENV_DEV 2 /* overwritten on SD boot */ |
| 134 | #define CONFIG_SYS_MMC_ENV_PART 1 /* overwritten on SD boot */ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 135 | #define CONFIG_ENV_SIZE (8 * 1024) |
| 136 | #define CONFIG_ENV_OFFSET (384 * 1024) |
| 137 | #define CONFIG_ENV_OVERWRITE |
| 138 | |
| 139 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 140 | "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \ |
| 141 | "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \ |
| 142 | "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \ |
| 143 | "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \ |
| 144 | "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \ |
| 145 | "${bootargs_mmc3}\0" \ |
| 146 | "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \ |
| 147 | "rdinit=/sbin/init enable_wait_mode=off\0" \ |
| 148 | "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \ |
Soeren Moch | b9a1609 | 2015-10-01 22:48:04 +0200 | [diff] [blame] | 149 | "mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \ |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 150 | "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \ |
| 151 | "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \ |
| 152 | "run bootargs_upd; " \ |
| 153 | "bootm 0x10800000 0x10d00000\0" \ |
| 154 | "console=ttymxc0\0" \ |
| 155 | "fan=gpio set 92\0" \ |
Soeren Moch | 8741a37 | 2016-07-27 16:07:16 +0200 | [diff] [blame] | 156 | "set_con_serial=setenv stdout serial; " \ |
Soeren Moch | 54ca183 | 2015-05-05 23:09:19 +0200 | [diff] [blame] | 157 | "setenv stderr serial;\0" \ |
Soeren Moch | 8741a37 | 2016-07-27 16:07:16 +0200 | [diff] [blame] | 158 | "set_con_hdmi=setenv stdout serial,vga; " \ |
| 159 | "setenv stderr serial,vga;\0" \ |
Soeren Moch | 8ce747f | 2016-07-27 16:07:17 +0200 | [diff] [blame] | 160 | "stderr=serial,vga;\0" \ |
| 161 | "stdin=serial,usbkbd;\0" \ |
| 162 | "stdout=serial,vga;\0" |
Soeren Moch | 05d492a | 2014-11-03 13:57:01 +0100 | [diff] [blame] | 163 | |
| 164 | #define CONFIG_BOOTCOMMAND \ |
| 165 | "mmc rescan; " \ |
| 166 | "if run bootcmd_up1; then " \ |
| 167 | "run bootcmd_up2; " \ |
| 168 | "else " \ |
| 169 | "run bootcmd_mmc; " \ |
| 170 | "fi" |
| 171 | |
| 172 | #endif /* __TBS2910_CONFIG_H * */ |