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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Vadim Bendebury5e124722011-10-17 08:36:14 +00002/*
Che-liang Chiou8732b072013-02-28 09:34:57 +00003 * Copyright (c) 2013 The Chromium OS Authors.
Reinhard Pfaube6c1522013-06-26 15:55:13 +02004 * Coypright (c) 2013 Guntermann & Drunck GmbH
Vadim Bendebury5e124722011-10-17 08:36:14 +00005 */
6
Miquel Raynald677bfe2018-05-15 11:57:06 +02007#ifndef __TPM_V1_H
8#define __TPM_V1_H
Vadim Bendebury5e124722011-10-17 08:36:14 +00009
Miquel Raynald677bfe2018-05-15 11:57:06 +020010#include <tpm-common.h>
Vadim Bendebury5e124722011-10-17 08:36:14 +000011
Miquel Raynald677bfe2018-05-15 11:57:06 +020012/* Useful constants */
13enum {
14 TPM_REQUEST_HEADER_LENGTH = 10,
15 TPM_RESPONSE_HEADER_LENGTH = 10,
16 PCR_DIGEST_LENGTH = 20,
17 DIGEST_LENGTH = 20,
18 TPM_REQUEST_AUTH_LENGTH = 45,
19 TPM_RESPONSE_AUTH_LENGTH = 41,
20 /* some max lengths, valid for RSA keys <= 2048 bits */
21 TPM_KEY12_MAX_LENGTH = 618,
22 TPM_PUBKEY_MAX_LENGTH = 288,
Simon Glassf255d312015-08-22 18:31:31 -060023};
24
Che-liang Chiou8732b072013-02-28 09:34:57 +000025enum tpm_startup_type {
26 TPM_ST_CLEAR = 0x0001,
27 TPM_ST_STATE = 0x0002,
28 TPM_ST_DEACTIVATED = 0x0003,
29};
30
31enum tpm_physical_presence {
32 TPM_PHYSICAL_PRESENCE_HW_DISABLE = 0x0200,
33 TPM_PHYSICAL_PRESENCE_CMD_DISABLE = 0x0100,
34 TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK = 0x0080,
35 TPM_PHYSICAL_PRESENCE_HW_ENABLE = 0x0040,
36 TPM_PHYSICAL_PRESENCE_CMD_ENABLE = 0x0020,
37 TPM_PHYSICAL_PRESENCE_NOTPRESENT = 0x0010,
38 TPM_PHYSICAL_PRESENCE_PRESENT = 0x0008,
39 TPM_PHYSICAL_PRESENCE_LOCK = 0x0004,
40};
41
42enum tpm_nv_index {
43 TPM_NV_INDEX_LOCK = 0xffffffff,
44 TPM_NV_INDEX_0 = 0x00000000,
45 TPM_NV_INDEX_DIR = 0x10000001,
46};
47
Mario Six7690be32017-01-11 16:00:50 +010048enum tpm_resource_type {
49 TPM_RT_KEY = 0x00000001,
50 TPM_RT_AUTH = 0x00000002,
51 TPM_RT_HASH = 0x00000003,
52 TPM_RT_TRANS = 0x00000004,
53 TPM_RT_CONTEXT = 0x00000005,
54 TPM_RT_COUNTER = 0x00000006,
55 TPM_RT_DELEGATE = 0x00000007,
56 TPM_RT_DAA_TPM = 0x00000008,
57 TPM_RT_DAA_V0 = 0x00000009,
58 TPM_RT_DAA_V1 = 0x0000000A,
59};
60
61enum tpm_capability_areas {
62 TPM_CAP_ORD = 0x00000001,
63 TPM_CAP_ALG = 0x00000002,
64 TPM_CAP_PID = 0x00000003,
65 TPM_CAP_FLAG = 0x00000004,
66 TPM_CAP_PROPERTY = 0x00000005,
67 TPM_CAP_VERSION = 0x00000006,
68 TPM_CAP_KEY_HANDLE = 0x00000007,
69 TPM_CAP_CHECK_LOADED = 0x00000008,
70 TPM_CAP_SYM_MODE = 0x00000009,
71 TPM_CAP_KEY_STATUS = 0x0000000C,
72 TPM_CAP_NV_LIST = 0x0000000D,
73 TPM_CAP_MFR = 0x00000010,
74 TPM_CAP_NV_INDEX = 0x00000011,
75 TPM_CAP_TRANS_ALG = 0x00000012,
76 TPM_CAP_HANDLE = 0x00000014,
77 TPM_CAP_TRANS_ES = 0x00000015,
78 TPM_CAP_AUTH_ENCRYPT = 0x00000017,
79 TPM_CAP_SELECT_SIZE = 0x00000018,
80 TPM_CAP_DA_LOGIC = 0x00000019,
81 TPM_CAP_VERSION_VAL = 0x0000001A,
82};
83
Simon Glass998af312018-10-01 11:55:17 -060084enum tmp_cap_flag {
85 TPM_CAP_FLAG_PERMANENT = 0x108,
86};
87
88#define TPM_TAG_PERMANENT_FLAGS 0x001f
89
Miquel Raynalfded8372018-05-15 11:57:01 +020090#define TPM_NV_PER_GLOBALLOCK BIT(15)
91#define TPM_NV_PER_PPREAD BIT(16)
92#define TPM_NV_PER_PPWRITE BIT(0)
93#define TPM_NV_PER_READ_STCLEAR BIT(31)
94#define TPM_NV_PER_WRITE_STCLEAR BIT(14)
95#define TPM_NV_PER_WRITEDEFINE BIT(13)
96#define TPM_NV_PER_WRITEALL BIT(12)
Simon Glass2132f972015-08-22 18:31:41 -060097
98enum {
99 TPM_PUBEK_SIZE = 256,
100};
101
Simon Glass998af312018-10-01 11:55:17 -0600102enum {
103 TPM_CMD_EXTEND = 0x14,
104 TPM_CMD_GET_CAPABILITY = 0x65,
105 TPM_CMD_NV_DEFINE_SPACE = 0xcc,
106 TPM_CMD_NV_WRITE_VALUE = 0xcd,
107 TPM_CMD_NV_READ_VALUE = 0xcf,
108};
109
Che-liang Chiou8732b072013-02-28 09:34:57 +0000110/**
Reinhard Pfaube6c1522013-06-26 15:55:13 +0200111 * TPM return codes as defined in the TCG Main specification
112 * (TPM Main Part 2 Structures; Specification version 1.2)
113 */
114enum tpm_return_code {
115 TPM_BASE = 0x00000000,
116 TPM_NON_FATAL = 0x00000800,
117 TPM_SUCCESS = TPM_BASE,
118 /* TPM-defined fatal error codes */
119 TPM_AUTHFAIL = TPM_BASE + 1,
120 TPM_BADINDEX = TPM_BASE + 2,
121 TPM_BAD_PARAMETER = TPM_BASE + 3,
122 TPM_AUDITFAILURE = TPM_BASE + 4,
123 TPM_CLEAR_DISABLED = TPM_BASE + 5,
124 TPM_DEACTIVATED = TPM_BASE + 6,
125 TPM_DISABLED = TPM_BASE + 7,
126 TPM_DISABLED_CMD = TPM_BASE + 8,
127 TPM_FAIL = TPM_BASE + 9,
128 TPM_BAD_ORDINAL = TPM_BASE + 10,
129 TPM_INSTALL_DISABLED = TPM_BASE + 11,
130 TPM_INVALID_KEYHANDLE = TPM_BASE + 12,
131 TPM_KEYNOTFOUND = TPM_BASE + 13,
132 TPM_INAPPROPRIATE_ENC = TPM_BASE + 14,
133 TPM_MIGRATE_FAIL = TPM_BASE + 15,
134 TPM_INVALID_PCR_INFO = TPM_BASE + 16,
135 TPM_NOSPACE = TPM_BASE + 17,
136 TPM_NOSRK = TPM_BASE + 18,
137 TPM_NOTSEALED_BLOB = TPM_BASE + 19,
138 TPM_OWNER_SET = TPM_BASE + 20,
139 TPM_RESOURCES = TPM_BASE + 21,
140 TPM_SHORTRANDOM = TPM_BASE + 22,
141 TPM_SIZE = TPM_BASE + 23,
142 TPM_WRONGPCRVAL = TPM_BASE + 24,
143 TPM_BAD_PARAM_SIZE = TPM_BASE + 25,
144 TPM_SHA_THREAD = TPM_BASE + 26,
145 TPM_SHA_ERROR = TPM_BASE + 27,
146 TPM_FAILEDSELFTEST = TPM_BASE + 28,
147 TPM_AUTH2FAIL = TPM_BASE + 29,
148 TPM_BADTAG = TPM_BASE + 30,
149 TPM_IOERROR = TPM_BASE + 31,
150 TPM_ENCRYPT_ERROR = TPM_BASE + 32,
151 TPM_DECRYPT_ERROR = TPM_BASE + 33,
152 TPM_INVALID_AUTHHANDLE = TPM_BASE + 34,
153 TPM_NO_ENDORSEMENT = TPM_BASE + 35,
154 TPM_INVALID_KEYUSAGE = TPM_BASE + 36,
155 TPM_WRONG_ENTITYTYPE = TPM_BASE + 37,
156 TPM_INVALID_POSTINIT = TPM_BASE + 38,
157 TPM_INAPPROPRIATE_SIG = TPM_BASE + 39,
158 TPM_BAD_KEY_PROPERTY = TPM_BASE + 40,
159 TPM_BAD_MIGRATION = TPM_BASE + 41,
160 TPM_BAD_SCHEME = TPM_BASE + 42,
161 TPM_BAD_DATASIZE = TPM_BASE + 43,
162 TPM_BAD_MODE = TPM_BASE + 44,
163 TPM_BAD_PRESENCE = TPM_BASE + 45,
164 TPM_BAD_VERSION = TPM_BASE + 46,
165 TPM_NO_WRAP_TRANSPORT = TPM_BASE + 47,
166 TPM_AUDITFAIL_UNSUCCESSFUL = TPM_BASE + 48,
167 TPM_AUDITFAIL_SUCCESSFUL = TPM_BASE + 49,
168 TPM_NOTRESETABLE = TPM_BASE + 50,
169 TPM_NOTLOCAL = TPM_BASE + 51,
170 TPM_BAD_TYPE = TPM_BASE + 52,
171 TPM_INVALID_RESOURCE = TPM_BASE + 53,
172 TPM_NOTFIPS = TPM_BASE + 54,
173 TPM_INVALID_FAMILY = TPM_BASE + 55,
174 TPM_NO_NV_PERMISSION = TPM_BASE + 56,
175 TPM_REQUIRES_SIGN = TPM_BASE + 57,
176 TPM_KEY_NOTSUPPORTED = TPM_BASE + 58,
177 TPM_AUTH_CONFLICT = TPM_BASE + 59,
178 TPM_AREA_LOCKED = TPM_BASE + 60,
179 TPM_BAD_LOCALITY = TPM_BASE + 61,
180 TPM_READ_ONLY = TPM_BASE + 62,
181 TPM_PER_NOWRITE = TPM_BASE + 63,
182 TPM_FAMILY_COUNT = TPM_BASE + 64,
183 TPM_WRITE_LOCKED = TPM_BASE + 65,
184 TPM_BAD_ATTRIBUTES = TPM_BASE + 66,
185 TPM_INVALID_STRUCTURE = TPM_BASE + 67,
186 TPM_KEY_OWNER_CONTROL = TPM_BASE + 68,
187 TPM_BAD_COUNTER = TPM_BASE + 69,
188 TPM_NOT_FULLWRITE = TPM_BASE + 70,
189 TPM_CONTEXT_GAP = TPM_BASE + 71,
190 TPM_MAXNVWRITES = TPM_BASE + 72,
191 TPM_NOOPERATOR = TPM_BASE + 73,
192 TPM_RESOURCEMISSING = TPM_BASE + 74,
193 TPM_DELEGATE_LOCK = TPM_BASE + 75,
194 TPM_DELEGATE_FAMILY = TPM_BASE + 76,
195 TPM_DELEGATE_ADMIN = TPM_BASE + 77,
196 TPM_TRANSPORT_NOTEXCLUSIVE = TPM_BASE + 78,
197 TPM_OWNER_CONTROL = TPM_BASE + 79,
198 TPM_DAA_RESOURCES = TPM_BASE + 80,
199 TPM_DAA_INPUT_DATA0 = TPM_BASE + 81,
200 TPM_DAA_INPUT_DATA1 = TPM_BASE + 82,
201 TPM_DAA_ISSUER_SETTINGS = TPM_BASE + 83,
202 TPM_DAA_TPM_SETTINGS = TPM_BASE + 84,
203 TPM_DAA_STAGE = TPM_BASE + 85,
204 TPM_DAA_ISSUER_VALIDITY = TPM_BASE + 86,
205 TPM_DAA_WRONG_W = TPM_BASE + 87,
206 TPM_BAD_HANDLE = TPM_BASE + 88,
207 TPM_BAD_DELEGATE = TPM_BASE + 89,
208 TPM_BADCONTEXT = TPM_BASE + 90,
209 TPM_TOOMANYCONTEXTS = TPM_BASE + 91,
210 TPM_MA_TICKET_SIGNATURE = TPM_BASE + 92,
211 TPM_MA_DESTINATION = TPM_BASE + 93,
212 TPM_MA_SOURCE = TPM_BASE + 94,
213 TPM_MA_AUTHORITY = TPM_BASE + 95,
214 TPM_PERMANENTEK = TPM_BASE + 97,
215 TPM_BAD_SIGNATURE = TPM_BASE + 98,
216 TPM_NOCONTEXTSPACE = TPM_BASE + 99,
217 /* TPM-defined non-fatal errors */
218 TPM_RETRY = TPM_BASE + TPM_NON_FATAL,
219 TPM_NEEDS_SELFTEST = TPM_BASE + TPM_NON_FATAL + 1,
220 TPM_DOING_SELFTEST = TPM_BASE + TPM_NON_FATAL + 2,
221 TPM_DEFEND_LOCK_RUNNING = TPM_BASE + TPM_NON_FATAL + 3,
222};
223
Simon Glass2132f972015-08-22 18:31:41 -0600224struct tpm_permanent_flags {
225 __be16 tag;
226 u8 disable;
227 u8 ownership;
228 u8 deactivated;
229 u8 read_pubek;
230 u8 disable_owner_clear;
231 u8 allow_maintenance;
232 u8 physical_presence_lifetime_lock;
233 u8 physical_presence_hw_enable;
234 u8 physical_presence_cmd_enable;
235 u8 cekp_used;
236 u8 tpm_post;
237 u8 tpm_post_lock;
238 u8 fips;
239 u8 operator;
240 u8 enable_revoke_ek;
241 u8 nv_locked;
242 u8 read_srk_pub;
243 u8 tpm_established;
244 u8 maintenance_done;
245 u8 disable_full_da_logic_info;
246} __packed;
247
Simon Glassef8a2502018-10-01 11:55:18 -0600248#define TPM_SHA1_160_HASH_LEN 0x14
249
250struct __packed tpm_composite_hash {
251 u8 digest[TPM_SHA1_160_HASH_LEN];
252};
253
254struct __packed tpm_pcr_selection {
255 __be16 size_of_select;
256 u8 pcr_select[3]; /* matches vboot's struct */
257};
258
259struct __packed tpm_pcr_info_short {
260 struct tpm_pcr_selection pcr_selection;
261 u8 locality_at_release;
262 struct tpm_composite_hash digest_at_release;
263};
264
265struct __packed tpm_nv_attributes {
266 __be16 tag;
267 __be32 attributes;
268};
269
270struct __packed tpm_nv_data_public {
271 __be16 tag;
272 __be32 nv_index;
273 struct tpm_pcr_info_short pcr_info_read;
274 struct tpm_pcr_info_short pcr_info_write;
275 struct tpm_nv_attributes permission;
276 u8 read_st_clear;
277 u8 write_st_clear;
278 u8 write_define;
279 __be32 data_size;
280};
281
Che-liang Chiou8732b072013-02-28 09:34:57 +0000282/**
283 * Issue a TPM_Startup command.
Vadim Bendebury5e124722011-10-17 08:36:14 +0000284 *
Che-liang Chiou8732b072013-02-28 09:34:57 +0000285 * @param mode TPM startup mode
286 * @return return code of the operation
Vadim Bendebury5e124722011-10-17 08:36:14 +0000287 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200288u32 tpm_startup(enum tpm_startup_type mode);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000289
Che-liang Chiou8732b072013-02-28 09:34:57 +0000290/**
291 * Issue a TPM_SelfTestFull command.
Vadim Bendebury5e124722011-10-17 08:36:14 +0000292 *
Che-liang Chiou8732b072013-02-28 09:34:57 +0000293 * @return return code of the operation
Vadim Bendebury5e124722011-10-17 08:36:14 +0000294 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200295u32 tpm_self_test_full(void);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000296
Che-liang Chiou8732b072013-02-28 09:34:57 +0000297/**
298 * Issue a TPM_ContinueSelfTest command.
299 *
300 * @return return code of the operation
301 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200302u32 tpm_continue_self_test(void);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000303
304/**
305 * Issue a TPM_NV_DefineSpace command. The implementation is limited
306 * to specify TPM_NV_ATTRIBUTES and size of the area. The area index
307 * could be one of the special value listed in enum tpm_nv_index.
308 *
309 * @param index index of the area
310 * @param perm TPM_NV_ATTRIBUTES of the area
311 * @param size size of the area
312 * @return return code of the operation
313 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200314u32 tpm_nv_define_space(u32 index, u32 perm, u32 size);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000315
316/**
317 * Issue a TPM_NV_ReadValue command. This implementation is limited
318 * to read the area from offset 0. The area index could be one of
319 * the special value listed in enum tpm_nv_index.
320 *
321 * @param index index of the area
322 * @param data output buffer of the area contents
323 * @param count size of output buffer
324 * @return return code of the operation
325 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200326u32 tpm_nv_read_value(u32 index, void *data, u32 count);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000327
328/**
329 * Issue a TPM_NV_WriteValue command. This implementation is limited
330 * to write the area from offset 0. The area index could be one of
331 * the special value listed in enum tpm_nv_index.
332 *
333 * @param index index of the area
334 * @param data input buffer to be wrote to the area
335 * @param length length of data bytes of input buffer
336 * @return return code of the operation
337 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200338u32 tpm_nv_write_value(u32 index, const void *data, u32 length);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000339
340/**
341 * Issue a TPM_Extend command.
342 *
343 * @param index index of the PCR
344 * @param in_digest 160-bit value representing the event to be
345 * recorded
346 * @param out_digest 160-bit PCR value after execution of the
347 * command
348 * @return return code of the operation
349 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200350u32 tpm_extend(u32 index, const void *in_digest, void *out_digest);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000351
352/**
353 * Issue a TPM_PCRRead command.
354 *
355 * @param index index of the PCR
356 * @param data output buffer for contents of the named PCR
357 * @param count size of output buffer
358 * @return return code of the operation
359 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200360u32 tpm_pcr_read(u32 index, void *data, size_t count);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000361
362/**
363 * Issue a TSC_PhysicalPresence command. TPM physical presence flag
364 * is bit-wise OR'ed of flags listed in enum tpm_physical_presence.
365 *
366 * @param presence TPM physical presence flag
367 * @return return code of the operation
368 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200369u32 tpm_tsc_physical_presence(u16 presence);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000370
371/**
372 * Issue a TPM_ReadPubek command.
373 *
374 * @param data output buffer for the public endorsement key
Miquel Raynal52da18a2018-05-15 11:57:02 +0200375 * @param count size of output buffer
Che-liang Chiou8732b072013-02-28 09:34:57 +0000376 * @return return code of the operation
377 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200378u32 tpm_read_pubek(void *data, size_t count);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000379
380/**
381 * Issue a TPM_ForceClear command.
382 *
383 * @return return code of the operation
384 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200385u32 tpm_force_clear(void);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000386
387/**
388 * Issue a TPM_PhysicalEnable command.
389 *
390 * @return return code of the operation
391 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200392u32 tpm_physical_enable(void);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000393
394/**
395 * Issue a TPM_PhysicalDisable command.
396 *
397 * @return return code of the operation
398 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200399u32 tpm_physical_disable(void);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000400
401/**
402 * Issue a TPM_PhysicalSetDeactivated command.
403 *
404 * @param state boolean state of the deactivated flag
405 * @return return code of the operation
406 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200407u32 tpm_physical_set_deactivated(u8 state);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000408
409/**
410 * Issue a TPM_GetCapability command. This implementation is limited
411 * to query sub_cap index that is 4-byte wide.
412 *
413 * @param cap_area partition of capabilities
414 * @param sub_cap further definition of capability, which is
415 * limited to be 4-byte wide
416 * @param cap output buffer for capability information
Miquel Raynal52da18a2018-05-15 11:57:02 +0200417 * @param count size of output buffer
Che-liang Chiou8732b072013-02-28 09:34:57 +0000418 * @return return code of the operation
419 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200420u32 tpm_get_capability(u32 cap_area, u32 sub_cap, void *cap, size_t count);
Che-liang Chiou8732b072013-02-28 09:34:57 +0000421
Reinhard Pfaube6c1522013-06-26 15:55:13 +0200422/**
Miquel Raynal52da18a2018-05-15 11:57:02 +0200423 * Issue a TPM_FlushSpecific command for a AUTH resource.
Reinhard Pfaube6c1522013-06-26 15:55:13 +0200424 *
425 * @param auth_handle handle of the auth session
426 * @return return code of the operation
427 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200428u32 tpm_terminate_auth_session(u32 auth_handle);
Reinhard Pfaube6c1522013-06-26 15:55:13 +0200429
430/**
Miquel Raynal52da18a2018-05-15 11:57:02 +0200431 * Issue a TPM_OIAP command to setup an object independent authorization
Reinhard Pfaube6c1522013-06-26 15:55:13 +0200432 * session.
433 * Information about the session is stored internally.
434 * If there was already an OIAP session active it is terminated and a new
435 * session is set up.
436 *
437 * @param auth_handle pointer to the (new) auth handle or NULL.
438 * @return return code of the operation
439 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200440u32 tpm_oiap(u32 *auth_handle);
Reinhard Pfaube6c1522013-06-26 15:55:13 +0200441
442/**
443 * Ends an active OIAP session.
444 *
445 * @return return code of the operation
446 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200447u32 tpm_end_oiap(void);
Reinhard Pfaube6c1522013-06-26 15:55:13 +0200448
449/**
450 * Issue a TPM_LoadKey2 (Auth1) command using an OIAP session for authenticating
451 * the usage of the parent key.
452 *
453 * @param parent_handle handle of the parent key.
454 * @param key pointer to the key structure (TPM_KEY or TPM_KEY12).
455 * @param key_length size of the key structure
456 * @param parent_key_usage_auth usage auth for the parent key
457 * @param key_handle pointer to the key handle
458 * @return return code of the operation
459 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200460u32 tpm_load_key2_oiap(u32 parent_handle, const void *key, size_t key_length,
461 const void *parent_key_usage_auth, u32 *key_handle);
Reinhard Pfaube6c1522013-06-26 15:55:13 +0200462
463/**
464 * Issue a TPM_GetPubKey (Auth1) command using an OIAP session for
465 * authenticating the usage of the key.
466 *
467 * @param key_handle handle of the key
468 * @param usage_auth usage auth for the key
469 * @param pubkey pointer to the pub key buffer; may be NULL if the pubkey
470 * should not be stored.
471 * @param pubkey_len pointer to the pub key buffer len. On entry: the size of
472 * the provided pubkey buffer. On successful exit: the size
473 * of the stored TPM_PUBKEY structure (iff pubkey != NULL).
474 * @return return code of the operation
475 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200476u32 tpm_get_pub_key_oiap(u32 key_handle, const void *usage_auth, void *pubkey,
477 size_t *pubkey_len);
Reinhard Pfaube6c1522013-06-26 15:55:13 +0200478
Simon Glass2132f972015-08-22 18:31:41 -0600479/**
480 * Get the TPM permanent flags value
481 *
482 * @param pflags Place to put permanent flags
483 * @return return code of the operation
484 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200485u32 tpm_get_permanent_flags(struct tpm_permanent_flags *pflags);
Simon Glass2132f972015-08-22 18:31:41 -0600486
487/**
488 * Get the TPM permissions
489 *
490 * @param perm Returns permissions value
491 * @return return code of the operation
492 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200493u32 tpm_get_permissions(u32 index, u32 *perm);
Simon Glass2132f972015-08-22 18:31:41 -0600494
Mario Six7690be32017-01-11 16:00:50 +0100495/**
496 * Flush a resource with a given handle and type from the TPM
497 *
498 * @param key_handle handle of the resource
499 * @param resource_type type of the resource
500 * @return return code of the operation
501 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200502u32 tpm_flush_specific(u32 key_handle, u32 resource_type);
Mario Six7690be32017-01-11 16:00:50 +0100503
mario.six@gdsys.cc0f4b2ba2017-03-20 10:28:28 +0100504#ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1
505/**
506 * Search for a key by usage AuthData and the hash of the parent's pub key.
507 *
508 * @param auth Usage auth of the key to search for
509 * @param pubkey_digest SHA1 hash of the pub key structure of the key
510 * @param[out] handle The handle of the key (Non-null iff found)
511 * @return 0 if key was found in TPM; != 0 if not.
512 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200513u32 tpm_find_key_sha1(const u8 auth[20], const u8 pubkey_digest[20],
514 u32 *handle);
mario.six@gdsys.cc0f4b2ba2017-03-20 10:28:28 +0100515#endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */
André Draszik3c605022017-10-03 16:55:52 +0100516
517/**
518 * Read random bytes from the TPM RNG. The implementation deals with the fact
519 * that the TPM may legally return fewer bytes than requested by retrying
520 * until @p count bytes have been received.
521 *
522 * @param data output buffer for the random bytes
523 * @param count size of output buffer
524 * @return return code of the operation
525 */
Miquel Raynalb9804e52018-05-15 11:56:59 +0200526u32 tpm_get_random(void *data, u32 count);
André Draszik3c605022017-10-03 16:55:52 +0100527
Simon Glass6e64ec12018-10-01 12:22:29 -0600528/**
529 * tpm_finalise_physical_presence() - Finalise physical presence
530 *
531 * @return return code of the operation (0 = success)
532 */
533u32 tpm_finalise_physical_presence(void);
534
535/**
536 * tpm_nv_set_locked() - lock the non-volatile space
537 *
538 * @return return code of the operation (0 = success)
539 */
540u32 tpm_nv_set_locked(void);
541
542/**
543 * tpm_set_global_lock() - set the global lock
544 *
545 * @return return code of the operation (0 = success)
546 */
547u32 tpm_set_global_lock(void);
548
549/**
550 * tpm_resume() - start up the TPM from resume (after suspend)
551 *
552 * @return return code of the operation (0 = success)
553 */
554u32 tpm_resume(void);
555
Miquel Raynald677bfe2018-05-15 11:57:06 +0200556#endif /* __TPM_V1_H */