Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 6f004adaf6f80b64f20bc2ed64615610588f3154 / . / configs / T2080RDB_SPIFLASH_defconfig
blob: 6a9752ab416f7c9bb575439f25061b0ca77046e3 [file] [log] [blame]
Masahiro Yamada252ed872015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_PPC=y
Tom Rini278b90c2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0x00201000
Simon Glass77d2f7f2016-09-12 23:18:41 -0600[diff] [blame]3CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glasscc4288e2016-09-12 23:18:43 -0600[diff] [blame]4CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini53def462020-11-30 12:50:32 -0500[diff] [blame]5CONFIG_SYS_MEMTEST_START=0x00200000
6CONFIG_SYS_MEMTEST_END=0x00400000
Tom Rini052170c2020-01-22 13:38:00 -0500[diff] [blame]7CONFIG_ENV_SIZE=0x2000
Tom Rini052170c2020-01-22 13:38:00 -0500[diff] [blame]8CONFIG_ENV_OFFSET=0x100000
Tom Rini556fd592020-04-28 16:15:47 -0400[diff] [blame]9CONFIG_ENV_SECT_SIZE=0x10000
Tom Rini2bba7802021-06-28 10:17:29 -0400[diff] [blame]10CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
Tom Rinic5a6e9f2020-07-06 13:54:25 -0400[diff] [blame]11CONFIG_SPL_TEXT_BASE=0xFFFD8000
Simon Glass2a736062021-08-08 12:20:12 -0600[diff] [blame]12CONFIG_SPL_SERIAL=y
Simon Glass9ca00682021-07-10 21:14:31 -0600[diff] [blame]13CONFIG_SPL_DRIVERS_MISC=y
Tom Rini358b6a22018-06-04 11:57:37 -0400[diff] [blame]14CONFIG_SPL=y
Simon Glasse404ade2016-09-12 23:18:57 -0600[diff] [blame]15CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassea2ca7e2021-08-08 12:20:14 -0600[diff] [blame]16CONFIG_SPL_SPI=y
Masahiro Yamada252ed872015-03-12 13:24:39 +0900[diff] [blame]17CONFIG_MPC85xx=y
York Sun01671e62016-11-21 12:57:22 -0800[diff] [blame]18CONFIG_TARGET_T2080RDB=y
Simon Glass73223f02016-02-22 22:55:43 -0700[diff] [blame]19CONFIG_FIT=y
20CONFIG_FIT_VERBOSE=y
21CONFIG_OF_BOARD_SETUP=y
22CONFIG_OF_STDOUT_VIA_ALIAS=y
Tom Rinid8ef01e2021-08-24 23:11:49 -0400[diff] [blame]23CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
24CONFIG_RAMBOOT_PBL=y
25CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg"
26CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_spi_rcw.cfg"
Heiko Schocherbb597c02016-06-07 08:31:14 +0200[diff] [blame]27CONFIG_BOOTDELAY=10
Mario Six02ddc142018-03-28 14:38:15 +0200[diff] [blame]28CONFIG_BOARD_EARLY_INIT_R=y
Tom Rini75670c82018-02-06 12:15:38 -0500[diff] [blame]29# CONFIG_SPL_FRAMEWORK is not set
Tom Rinidb4080d2019-06-01 14:20:25 -0400[diff] [blame]30CONFIG_SPL_SPI_BOOT=y
31CONFIG_SPL_FSL_PBL=y
Tom Rini8728c972017-03-13 13:48:42 -0400[diff] [blame]32CONFIG_SPL_ENV_SUPPORT=y
Simon Glass975e7cf2021-07-10 21:14:36 -0600[diff] [blame]33CONFIG_SPL_I2C=y
Simon Glass6f004ad2021-08-08 12:20:16 -0600[diff] [blame^]34CONFIG_SPL_MPC8XXX_INIT_DDR=y
Tom Riniadad96e2016-04-21 21:37:19 -0400[diff] [blame]35CONFIG_HUSH_PARSER=y
Tuomas Tynkkynenad12dc12017-10-08 21:48:01 +0300[diff] [blame]36CONFIG_CMD_IMLS=y
Tom Rini88cd7d02021-08-17 17:59:45 -0400[diff] [blame]37CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]38CONFIG_CMD_MEMTEST=y
Mario Sixe89f8aa2018-03-28 14:38:14 +0200[diff] [blame]39CONFIG_SYS_ALT_MEMTEST=y
Camelia Grozaa24990b2021-04-13 19:47:58 +0300[diff] [blame]40CONFIG_CMD_DM=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]41CONFIG_CMD_I2C=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]42CONFIG_CMD_MMC=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]43CONFIG_CMD_USB=y
44CONFIG_CMD_DHCP=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]45CONFIG_CMD_MII=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]46CONFIG_CMD_PING=y
Siva Durga Prasad Paladugu0fd2290c2018-06-19 12:24:23 +0200[diff] [blame]47CONFIG_MP=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]48CONFIG_CMD_EXT2=y
49CONFIG_CMD_FAT=y
Tom Rinid56b4b12017-07-22 18:36:16 -0400[diff] [blame]50CONFIG_CMD_MTDPARTS=y
Tom Rini43ede0b2017-10-22 17:55:07 -0400[diff] [blame]51CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.1"
52CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.1:1m(uboot),5m(kernel),128k(dtb),-(user)"
Simon Glass1b330892017-05-17 03:25:39 -0600[diff] [blame]53# CONFIG_CMD_IRQ is not set
Hou Zhiqiangbf4e0ff2019-08-20 09:35:24 +0000[diff] [blame]54CONFIG_OF_CONTROL=y
Adam Forde91907a2020-07-03 06:48:56 -0500[diff] [blame]55CONFIG_ENV_OVERWRITE=y
Tom Rini5dc4dfd2017-08-28 07:16:32 -0400[diff] [blame]56CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rini665c35a2019-09-23 11:47:37 -0400[diff] [blame]57CONFIG_DM=y
Tom Rini28522672017-03-01 16:51:58 -0500[diff] [blame]58CONFIG_FSL_CAAM=y
Tom Riniefb5dab72021-08-21 13:50:17 -0400[diff] [blame]59CONFIG_DDR_CLK_FREQ=133330000
Tom Rini95372162021-08-21 13:50:18 -0400[diff] [blame]60CONFIG_DDR_ECC=y
61CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Tom Rinib11dc332020-05-08 09:08:39 -0400[diff] [blame]62CONFIG_DM_I2C=y
Tom Rini55dabcc2021-08-18 23:12:24 -0400[diff] [blame]63CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinifc8d3b92021-08-18 23:12:37 -0400[diff] [blame]64CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rini6d5d0c92021-08-18 23:12:35 -0400[diff] [blame]65CONFIG_SYS_I2C_FSL=y
66CONFIG_SYS_FSL_I2C_OFFSET=0x118000
67CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
68CONFIG_SYS_FSL_I2C2_OFFSET=0x118100
69CONFIG_SYS_FSL_HAS_I2C3_OFFSET=y
70CONFIG_SYS_FSL_I2C3_OFFSET=0x119000
71CONFIG_SYS_FSL_HAS_I2C4_OFFSET=y
72CONFIG_SYS_FSL_I2C4_OFFSET=0x119100
Tom Rini88cd7d02021-08-17 17:59:45 -0400[diff] [blame]73CONFIG_SYS_I2C_EEPROM_ADDR=0x50
Mario Six07dea2e2018-03-28 14:38:19 +0200[diff] [blame]74CONFIG_FSL_ESDHC=y
Tom Rini0cfccb52019-12-04 17:18:38 -0500[diff] [blame]75CONFIG_MTD=y
Adam Ford2fe88d42018-10-14 15:10:50 -0500[diff] [blame]76CONFIG_MTD_NOR_FLASH=y
77CONFIG_FLASH_CFI_DRIVER=y
78CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
79CONFIG_FLASH_CFI_MTD=y
80CONFIG_SYS_FLASH_CFI=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]81CONFIG_DM_SPI_FLASH=y
Patrick Delaunay14453fb2019-02-27 15:20:36 +0100[diff] [blame]82CONFIG_SF_DEFAULT_MODE=0
83CONFIG_SF_DEFAULT_SPEED=10000000
Bin Meng68d53422015-11-25 05:34:54 -0800[diff] [blame]84CONFIG_SPI_FLASH_STMICRO=y
Alexandru Gagniuc3146f0c2017-08-01 17:19:59 -0700[diff] [blame]85CONFIG_PHYLIB=y
Jeremy Gebben1c650102018-09-18 15:49:35 -0600[diff] [blame]86CONFIG_PHY_AQUANTIA=y
Tom Rini60f3c012019-11-26 17:32:42 -0500[diff] [blame]87CONFIG_PHY_CORTINA=y
Tom Rinie78f16b2019-11-26 17:32:43 -0500[diff] [blame]88CONFIG_SYS_CORTINA_FW_IN_SPIFLASH=y
Kuldeep Singhe99b1df2021-08-10 11:20:07 +0530[diff] [blame]89CONFIG_CORTINA_FW_ADDR=0x120000
Tom Rini306881a2020-04-24 15:35:53 -0400[diff] [blame]90CONFIG_PHY_REALTEK=y
Camelia Grozaa24990b2021-04-13 19:47:58 +0300[diff] [blame]91CONFIG_DM_ETH=y
92CONFIG_DM_MDIO=y
Simon Glassa77fda12015-08-19 09:33:43 -0600[diff] [blame]93CONFIG_E1000=y
Tom Rini665c35a2019-09-23 11:47:37 -0400[diff] [blame]94CONFIG_FMAN_ENET=y
95CONFIG_MII=y
Hou Zhiqiang57afc232019-08-27 11:02:59 +0000[diff] [blame]96CONFIG_PCIE_FSL=y
Tom Rinicc1e98b2019-05-12 07:59:12 -0400[diff] [blame]97CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
Chris Packham805c5252021-03-03 14:09:45 +1300[diff] [blame]98CONFIG_DM_RTC=y
99CONFIG_RTC_DS1307=y
Thomas Chou9e390032015-11-19 21:48:14 +0800[diff] [blame]100CONFIG_SYS_NS16550=y
Adam Fordf1b1f772018-04-15 13:51:26 -0400[diff] [blame]101CONFIG_SPI=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]102CONFIG_DM_SPI=y
Bin Menge5d5d442015-11-25 05:34:53 -0800[diff] [blame]103CONFIG_FSL_ESPI=y
Tom Rini645176d2016-09-08 16:31:26 -0400[diff] [blame]104CONFIG_USB=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]105CONFIG_USB_STORAGE=y
Marek Szyprowski69be8fd2020-06-03 14:43:40 +0200[diff] [blame]106CONFIG_ADDR_MAP=y
107CONFIG_SYS_NUM_ADDR_MAP=64