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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ben Warren04a9e112008-01-16 22:37:35 -05002/*
3 * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
Stefan Roesea47a12b2010-04-15 16:07:28 +02004 * With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers
Ben Warren04a9e112008-01-16 22:37:35 -05005 */
6
7#include <common.h>
Ben Warren8931ab12008-01-26 23:41:19 -05008
Haavard Skinnemoend255bb02008-05-16 11:10:31 +02009#include <malloc.h>
Ben Warren04a9e112008-01-16 22:37:35 -050010#include <spi.h>
11#include <asm/mpc8xxx_spi.h>
12
Kim Phillips2956acd2008-01-17 12:48:00 -060013#define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */
14#define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */
Ben Warren04a9e112008-01-16 22:37:35 -050015
Kim Phillips2956acd2008-01-17 12:48:00 -060016#define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */
17#define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */
18#define SPI_MODE_MS (0x80000000 >> 6) /* Always master */
19#define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */
Ben Warren04a9e112008-01-16 22:37:35 -050020
21#define SPI_TIMEOUT 1000
22
Mario Sixd896b7b2019-04-29 01:58:36 +053023struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
Haavard Skinnemoend255bb02008-05-16 11:10:31 +020024{
25 struct spi_slave *slave;
26
27 if (!spi_cs_is_valid(bus, cs))
28 return NULL;
29
Simon Glassd3504fe2013-03-18 19:23:40 +000030 slave = spi_alloc_slave_base(bus, cs);
Haavard Skinnemoend255bb02008-05-16 11:10:31 +020031 if (!slave)
32 return NULL;
33
Haavard Skinnemoend255bb02008-05-16 11:10:31 +020034 /*
35 * TODO: Some of the code in spi_init() should probably move
36 * here, or into spi_claim_bus() below.
37 */
38
39 return slave;
40}
41
42void spi_free_slave(struct spi_slave *slave)
43{
44 free(slave);
45}
46
Ben Warren04a9e112008-01-16 22:37:35 -050047void spi_init(void)
48{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020049 volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
Ben Warren04a9e112008-01-16 22:37:35 -050050
Kim Phillips2956acd2008-01-17 12:48:00 -060051 /*
Ben Warren04a9e112008-01-16 22:37:35 -050052 * SPI pins on the MPC83xx are not muxed, so all we do is initialize
53 * some registers
Kim Phillips2956acd2008-01-17 12:48:00 -060054 */
Ben Warren04a9e112008-01-16 22:37:35 -050055 spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN;
Mario Sixd93fe312019-04-29 01:58:37 +053056 /* Use SYSCLK / 8 (16.67MHz typ.) */
57 spi->mode = (spi->mode & 0xfff0ffff) | BIT(16);
58 /* Clear all SPI events */
59 spi->event = 0xffffffff;
60 /* Mask all SPI interrupts */
61 spi->mask = 0x00000000;
62 /* LST bit doesn't do anything, so disregard */
63 spi->com = 0;
Ben Warren04a9e112008-01-16 22:37:35 -050064}
65
Haavard Skinnemoend255bb02008-05-16 11:10:31 +020066int spi_claim_bus(struct spi_slave *slave)
67{
68 return 0;
69}
70
71void spi_release_bus(struct spi_slave *slave)
72{
Haavard Skinnemoend255bb02008-05-16 11:10:31 +020073}
74
Mario Sixd896b7b2019-04-29 01:58:36 +053075int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
76 ulong flags)
Ben Warren04a9e112008-01-16 22:37:35 -050077{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078 volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi;
Mario Sixd896b7b2019-04-29 01:58:36 +053079 uint tmpdout, tmpdin, event;
Mario Six01ac1e12019-04-29 01:58:38 +053080 int num_blks = DIV_ROUND_UP(bitlen, 32);
81 int tm, is_read = 0;
82 uchar char_size = 32;
Ben Warren04a9e112008-01-16 22:37:35 -050083
Haavard Skinnemoend255bb02008-05-16 11:10:31 +020084 debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n",
Mario Six6f3ac072019-04-29 01:58:39 +053085 slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);
Ben Warren04a9e112008-01-16 22:37:35 -050086
Haavard Skinnemoend255bb02008-05-16 11:10:31 +020087 if (flags & SPI_XFER_BEGIN)
88 spi_cs_activate(slave);
Ben Warren04a9e112008-01-16 22:37:35 -050089
Mario Sixd93fe312019-04-29 01:58:37 +053090 /* Clear all SPI events */
91 spi->event = 0xffffffff;
Ben Warren04a9e112008-01-16 22:37:35 -050092
Mario Sixd93fe312019-04-29 01:58:37 +053093 /* Handle data in 32-bit chunks */
Mario Six01ac1e12019-04-29 01:58:38 +053094 while (num_blks--) {
Ben Warren04a9e112008-01-16 22:37:35 -050095 tmpdout = 0;
Mario Six01ac1e12019-04-29 01:58:38 +053096 char_size = (bitlen >= 32 ? 32 : bitlen);
Ben Warren04a9e112008-01-16 22:37:35 -050097
98 /* Shift data so it's msb-justified */
Mario Six6f3ac072019-04-29 01:58:39 +053099 tmpdout = *(u32 *)dout >> (32 - char_size);
Ben Warren04a9e112008-01-16 22:37:35 -0500100
101 /* The LEN field of the SPMODE register is set as follows:
102 *
Kim Phillips2956acd2008-01-17 12:48:00 -0600103 * Bit length setting
104 * len <= 4 3
105 * 4 < len <= 16 len - 1
106 * len > 16 0
Ben Warren04a9e112008-01-16 22:37:35 -0500107 */
108
Ira W. Snyderf138ca12012-09-12 14:17:31 -0700109 spi->mode &= ~SPI_MODE_EN;
110
Kim Phillips2956acd2008-01-17 12:48:00 -0600111 if (bitlen <= 16) {
112 if (bitlen <= 4)
113 spi->mode = (spi->mode & 0xff0fffff) |
Wolfgang Denk93e14592013-10-04 17:43:24 +0200114 (3 << 20);
Kim Phillips2956acd2008-01-17 12:48:00 -0600115 else
116 spi->mode = (spi->mode & 0xff0fffff) |
Wolfgang Denk93e14592013-10-04 17:43:24 +0200117 ((bitlen - 1) << 20);
Kim Phillips2956acd2008-01-17 12:48:00 -0600118 } else {
119 spi->mode = (spi->mode & 0xff0fffff);
Ben Warren04a9e112008-01-16 22:37:35 -0500120 /* Set up the next iteration if sending > 32 bits */
121 bitlen -= 32;
122 dout += 4;
123 }
124
Ira W. Snyderf138ca12012-09-12 14:17:31 -0700125 spi->mode |= SPI_MODE_EN;
126
Mario Sixd93fe312019-04-29 01:58:37 +0530127 /* Write the data out */
128 spi->tx = tmpdout;
129
Ben Warren04a9e112008-01-16 22:37:35 -0500130 debug("*** spi_xfer: ... %08x written\n", tmpdout);
131
Kim Phillips2956acd2008-01-17 12:48:00 -0600132 /*
Ben Warren04a9e112008-01-16 22:37:35 -0500133 * Wait for SPI transmit to get out
134 * or time out (1 second = 1000 ms)
135 * The NE event must be read and cleared first
Kim Phillips2956acd2008-01-17 12:48:00 -0600136 */
Mario Six01ac1e12019-04-29 01:58:38 +0530137 for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) {
Ben Warren04a9e112008-01-16 22:37:35 -0500138 event = spi->event;
139 if (event & SPI_EV_NE) {
140 tmpdin = spi->rx;
141 spi->event |= SPI_EV_NE;
Mario Six01ac1e12019-04-29 01:58:38 +0530142 is_read = 1;
Ben Warren04a9e112008-01-16 22:37:35 -0500143
Mario Six6f3ac072019-04-29 01:58:39 +0530144 *(u32 *)din = (tmpdin << (32 - char_size));
Mario Six01ac1e12019-04-29 01:58:38 +0530145 if (char_size == 32) {
Ben Warren04a9e112008-01-16 22:37:35 -0500146 /* Advance output buffer by 32 bits */
147 din += 4;
148 }
149 }
Kim Phillips2956acd2008-01-17 12:48:00 -0600150 /*
151 * Only bail when we've had both NE and NF events.
Ben Warren04a9e112008-01-16 22:37:35 -0500152 * This will cause timeouts on RO devices, so maybe
153 * in the future put an arbitrary delay after writing
Kim Phillips2956acd2008-01-17 12:48:00 -0600154 * the device. Arbitrary delays suck, though...
155 */
Mario Six01ac1e12019-04-29 01:58:38 +0530156 if (is_read && (event & SPI_EV_NF))
Ben Warren04a9e112008-01-16 22:37:35 -0500157 break;
158 }
159 if (tm >= SPI_TIMEOUT)
160 puts("*** spi_xfer: Time out during SPI transfer");
161
162 debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin);
163 }
164
Haavard Skinnemoend255bb02008-05-16 11:10:31 +0200165 if (flags & SPI_XFER_END)
166 spi_cs_deactivate(slave);
Kim Phillips2956acd2008-01-17 12:48:00 -0600167
Ben Warren04a9e112008-01-16 22:37:35 -0500168 return 0;
169}