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wdenke85390d2002-04-01 14:29:03 +00001/*
2 * COM1 NS16550 support
Stefan Roesea47a12b2010-04-15 16:07:28 +02003 * originally from linux source (arch/powerpc/boot/ns16550.c)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02004 * modified to use CONFIG_SYS_ISA_MEM and new defines
wdenke85390d2002-04-01 14:29:03 +00005 */
6
Simon Glassfa54eb12014-09-04 16:27:32 -06007#include <common.h>
Simon Glass12e431b2014-09-04 16:27:34 -06008#include <dm.h>
9#include <errno.h>
10#include <fdtdec.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050011#include <mapmem.h>
wdenke85390d2002-04-01 14:29:03 +000012#include <ns16550.h>
Simon Glass12e431b2014-09-04 16:27:34 -060013#include <serial.h>
Ladislav Michla1b322a2010-02-01 23:34:25 +010014#include <watchdog.h>
Graeme Russ167cdad2010-04-24 00:05:46 +100015#include <linux/types.h>
16#include <asm/io.h>
wdenke85390d2002-04-01 14:29:03 +000017
Simon Glass12e431b2014-09-04 16:27:34 -060018DECLARE_GLOBAL_DATA_PTR;
19
Detlev Zundel200779e2009-04-03 11:53:01 +020020#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
21#define UART_MCRVAL (UART_MCR_DTR | \
22 UART_MCR_RTS) /* RTS/DTR */
23#define UART_FCRVAL (UART_FCR_FIFO_EN | \
24 UART_FCR_RXSR | \
25 UART_FCR_TXSR) /* Clear & enable FIFOs */
Simon Glass12e431b2014-09-04 16:27:34 -060026
27#ifndef CONFIG_DM_SERIAL
Graeme Russ167cdad2010-04-24 00:05:46 +100028#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glassf8df9d02011-10-15 19:14:09 +000029#define serial_out(x, y) outb(x, (ulong)y)
30#define serial_in(y) inb((ulong)y)
Dave Aldridge79df1202011-09-01 22:47:14 +000031#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
Simon Glassf8df9d02011-10-15 19:14:09 +000032#define serial_out(x, y) out_be32(y, x)
33#define serial_in(y) in_be32(y)
Dave Aldridge79df1202011-09-01 22:47:14 +000034#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
Simon Glassf8df9d02011-10-15 19:14:09 +000035#define serial_out(x, y) out_le32(y, x)
36#define serial_in(y) in_le32(y)
Graeme Russ167cdad2010-04-24 00:05:46 +100037#else
Simon Glassf8df9d02011-10-15 19:14:09 +000038#define serial_out(x, y) writeb(x, y)
39#define serial_in(y) readb(y)
Graeme Russ167cdad2010-04-24 00:05:46 +100040#endif
Simon Glass12e431b2014-09-04 16:27:34 -060041#endif /* !CONFIG_DM_SERIAL */
wdenke85390d2002-04-01 14:29:03 +000042
Khoronzhuk, Ivan7c387642014-07-16 00:59:25 +030043#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianovef509b92014-04-04 13:16:53 -040044#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
45#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
Karicheri, Muralidharand57dee52014-04-09 15:38:46 -040046#undef UART_MCRVAL
47#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
48#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
49#else
50#define UART_MCRVAL (UART_MCR_RTS)
51#endif
Vitaly Andrianovef509b92014-04-04 13:16:53 -040052#endif
53
Prafulla Wadaskara160ea02010-10-27 21:58:31 +053054#ifndef CONFIG_SYS_NS16550_IER
55#define CONFIG_SYS_NS16550_IER 0x00
56#endif /* CONFIG_SYS_NS16550_IER */
57
Simon Glass12e431b2014-09-04 16:27:34 -060058#ifdef CONFIG_DM_SERIAL
Simon Glass76571672015-01-26 18:27:08 -070059
Simon Glass363e6da2015-02-27 22:06:26 -070060static inline void serial_out_shift(void *addr, int shift, int value)
Simon Glass76571672015-01-26 18:27:08 -070061{
62#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
63 outb(value, (ulong)addr);
64#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
65 out_le32(addr, value);
66#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
67 out_be32(addr, value);
Simon Glass90914002015-05-12 14:55:02 -060068#elif defined(CONFIG_SYS_NS16550_MEM32)
69 writel(value, addr);
Simon Glass76571672015-01-26 18:27:08 -070070#elif defined(CONFIG_SYS_BIG_ENDIAN)
71 writeb(value, addr + (1 << shift) - 1);
72#else
73 writeb(value, addr);
74#endif
75}
76
Simon Glass363e6da2015-02-27 22:06:26 -070077static inline int serial_in_shift(void *addr, int shift)
Simon Glass76571672015-01-26 18:27:08 -070078{
79#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
80 return inb((ulong)addr);
81#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
82 return in_le32(addr);
83#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
84 return in_be32(addr);
Simon Glass90914002015-05-12 14:55:02 -060085#elif defined(CONFIG_SYS_NS16550_MEM32)
86 return readl(addr);
Simon Glass76571672015-01-26 18:27:08 -070087#elif defined(CONFIG_SYS_BIG_ENDIAN)
Axel Lin20379c12015-02-28 15:55:36 +080088 return readb(addr + (1 << shift) - 1);
Simon Glass76571672015-01-26 18:27:08 -070089#else
90 return readb(addr);
91#endif
92}
93
Simon Glass12e431b2014-09-04 16:27:34 -060094static void ns16550_writeb(NS16550_t port, int offset, int value)
95{
96 struct ns16550_platdata *plat = port->plat;
97 unsigned char *addr;
98
99 offset *= 1 << plat->reg_shift;
Simon Glass167efe02014-10-22 21:37:04 -0600100 addr = map_sysmem(plat->base, 0) + offset;
Simon Glass12e431b2014-09-04 16:27:34 -0600101 /*
102 * As far as we know it doesn't make sense to support selection of
103 * these options at run-time, so use the existing CONFIG options.
104 */
Simon Glass76571672015-01-26 18:27:08 -0700105 serial_out_shift(addr, plat->reg_shift, value);
Simon Glass12e431b2014-09-04 16:27:34 -0600106}
107
108static int ns16550_readb(NS16550_t port, int offset)
109{
110 struct ns16550_platdata *plat = port->plat;
111 unsigned char *addr;
112
113 offset *= 1 << plat->reg_shift;
Simon Glass167efe02014-10-22 21:37:04 -0600114 addr = map_sysmem(plat->base, 0) + offset;
Simon Glass76571672015-01-26 18:27:08 -0700115
116 return serial_in_shift(addr, plat->reg_shift);
Simon Glass12e431b2014-09-04 16:27:34 -0600117}
118
119/* We can clean these up once everything is moved to driver model */
120#define serial_out(value, addr) \
Simon Glass363e6da2015-02-27 22:06:26 -0700121 ns16550_writeb(com_port, \
122 (unsigned char *)addr - (unsigned char *)com_port, value)
Simon Glass12e431b2014-09-04 16:27:34 -0600123#define serial_in(addr) \
Simon Glass363e6da2015-02-27 22:06:26 -0700124 ns16550_readb(com_port, \
125 (unsigned char *)addr - (unsigned char *)com_port)
Simon Glass12e431b2014-09-04 16:27:34 -0600126#endif
127
Simon Glass21d00432015-01-26 18:27:09 -0700128static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
Simon Glassfa54eb12014-09-04 16:27:32 -0600129{
130 const unsigned int mode_x_div = 16;
131
Simon Glass21d00432015-01-26 18:27:09 -0700132 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
133}
134
135int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
136{
Simon Glassfa54eb12014-09-04 16:27:32 -0600137#ifdef CONFIG_OMAP1510
138 /* If can't cleanly clock 115200 set div to 1 */
139 if ((clock == 12000000) && (baudrate == 115200)) {
140 port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
141 return 1; /* return 1 for base divisor */
142 }
143 port->osc_12m_sel = 0; /* clear if previsouly set */
144#endif
145
Simon Glass21d00432015-01-26 18:27:09 -0700146 return calc_divisor(port, clock, baudrate);
Simon Glassfa54eb12014-09-04 16:27:32 -0600147}
148
Simon Glass8bbe33c2014-09-04 16:27:33 -0600149static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
150{
151 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
152 serial_out(baud_divisor & 0xff, &com_port->dll);
153 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
154 serial_out(UART_LCRVAL, &com_port->lcr);
155}
156
Simon Glassf8df9d02011-10-15 19:14:09 +0000157void NS16550_init(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000158{
Gregoire Gentil956a8ba2014-11-10 11:04:10 -0800159#if (defined(CONFIG_SPL_BUILD) && \
160 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000161 /*
Gregoire Gentil956a8ba2014-11-10 11:04:10 -0800162 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
163 * before SPL starts only THRE bit is set. We have to empty the
164 * transmitter before initialization starts.
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000165 */
166 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
167 == UART_LSR_THRE) {
Simon Glass12e431b2014-09-04 16:27:34 -0600168 if (baud_divisor != -1)
169 NS16550_setbrg(com_port, baud_divisor);
Manfred Huberfd2aeac2013-03-29 02:52:36 +0000170 serial_out(0, &com_port->mdr1);
171 }
172#endif
173
Scott Woodcb55b332012-09-18 18:19:05 -0500174 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
175 ;
176
Prafulla Wadaskara160ea02010-10-27 21:58:31 +0530177 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Tom Rini456ccfd2013-12-20 11:19:33 -0500178#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
179 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
Graeme Russ167cdad2010-04-24 00:05:46 +1000180 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
wdenk945af8d2003-07-16 21:53:01 +0000181#endif
Graeme Russ167cdad2010-04-24 00:05:46 +1000182 serial_out(UART_MCRVAL, &com_port->mcr);
183 serial_out(UART_FCRVAL, &com_port->fcr);
Simon Glass12e431b2014-09-04 16:27:34 -0600184 if (baud_divisor != -1)
185 NS16550_setbrg(com_port, baud_divisor);
Masahiro Yamada8ac22a62014-07-30 19:11:41 +0900186#if defined(CONFIG_OMAP) || \
Matt Porter6213a682013-03-15 10:07:09 +0000187 defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
TENART Antoine9ed6e412013-07-02 12:05:58 +0200188 defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
Chandan Nath5289e832011-10-14 02:58:26 +0000189
Simon Glassf8df9d02011-10-15 19:14:09 +0000190 /* /16 is proper to hit 115200 with 48MHz */
191 serial_out(0, &com_port->mdr1);
Mike Frysingerb4746d82009-02-11 20:26:52 -0500192#endif /* CONFIG_OMAP */
Khoronzhuk, Ivan7c387642014-07-16 00:59:25 +0300193#if defined(CONFIG_SOC_KEYSTONE)
Vitaly Andrianovef509b92014-04-04 13:16:53 -0400194 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
195#endif
wdenke85390d2002-04-01 14:29:03 +0000196}
197
Ron Madridf5675aa2009-02-18 14:30:44 -0800198#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassf8df9d02011-10-15 19:14:09 +0000199void NS16550_reinit(NS16550_t com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000200{
Prafulla Wadaskara160ea02010-10-27 21:58:31 +0530201 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600202 NS16550_setbrg(com_port, 0);
Graeme Russ167cdad2010-04-24 00:05:46 +1000203 serial_out(UART_MCRVAL, &com_port->mcr);
204 serial_out(UART_FCRVAL, &com_port->fcr);
Simon Glass8bbe33c2014-09-04 16:27:33 -0600205 NS16550_setbrg(com_port, baud_divisor);
wdenke85390d2002-04-01 14:29:03 +0000206}
Ron Madridf5675aa2009-02-18 14:30:44 -0800207#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
wdenke85390d2002-04-01 14:29:03 +0000208
Simon Glassf8df9d02011-10-15 19:14:09 +0000209void NS16550_putc(NS16550_t com_port, char c)
wdenke85390d2002-04-01 14:29:03 +0000210{
Simon Glassf8df9d02011-10-15 19:14:09 +0000211 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
212 ;
Graeme Russ167cdad2010-04-24 00:05:46 +1000213 serial_out(c, &com_port->thr);
Stefan Roese1a2d9b32010-10-12 09:39:45 +0200214
215 /*
216 * Call watchdog_reset() upon newline. This is done here in putc
217 * since the environment code uses a single puts() to print the complete
218 * environment upon "printenv". So we can't put this watchdog call
219 * in puts().
220 */
221 if (c == '\n')
222 WATCHDOG_RESET();
wdenke85390d2002-04-01 14:29:03 +0000223}
224
Ron Madridf5675aa2009-02-18 14:30:44 -0800225#ifndef CONFIG_NS16550_MIN_FUNCTIONS
Simon Glassf8df9d02011-10-15 19:14:09 +0000226char NS16550_getc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000227{
Graeme Russ167cdad2010-04-24 00:05:46 +1000228 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
Marek Vasutf2041382012-09-15 10:25:19 +0200229#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
wdenk232c1502004-03-12 00:14:09 +0000230 extern void usbtty_poll(void);
231 usbtty_poll();
232#endif
Ladislav Michla1b322a2010-02-01 23:34:25 +0100233 WATCHDOG_RESET();
wdenk232c1502004-03-12 00:14:09 +0000234 }
Graeme Russ167cdad2010-04-24 00:05:46 +1000235 return serial_in(&com_port->rbr);
wdenke85390d2002-04-01 14:29:03 +0000236}
237
Simon Glassf8df9d02011-10-15 19:14:09 +0000238int NS16550_tstc(NS16550_t com_port)
wdenke85390d2002-04-01 14:29:03 +0000239{
Simon Glassf8df9d02011-10-15 19:14:09 +0000240 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
wdenke85390d2002-04-01 14:29:03 +0000241}
242
Ron Madridf5675aa2009-02-18 14:30:44 -0800243#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
Simon Glass12e431b2014-09-04 16:27:34 -0600244
Simon Glass21d00432015-01-26 18:27:09 -0700245#ifdef CONFIG_DEBUG_UART_NS16550
246
247#include <debug_uart.h>
248
249void debug_uart_init(void)
250{
251 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
252 int baud_divisor;
253
254 /*
255 * We copy the code from above because it is already horribly messy.
256 * Trying to refactor to nicely remove the duplication doesn't seem
257 * feasible. The better fix is to move all users of this driver to
258 * driver model.
259 */
260 baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
261 CONFIG_BAUDRATE);
Simon Glassdd0b0122015-02-27 22:06:25 -0700262 serial_out_shift(&com_port->ier, CONFIG_DEBUG_UART_SHIFT,
263 CONFIG_SYS_NS16550_IER);
264 serial_out_shift(&com_port->mcr, CONFIG_DEBUG_UART_SHIFT, UART_MCRVAL);
265 serial_out_shift(&com_port->fcr, CONFIG_DEBUG_UART_SHIFT, UART_FCRVAL);
Simon Glass21d00432015-01-26 18:27:09 -0700266
Simon Glassdd0b0122015-02-27 22:06:25 -0700267 serial_out_shift(&com_port->lcr, CONFIG_DEBUG_UART_SHIFT,
268 UART_LCR_BKSE | UART_LCRVAL);
269 serial_out_shift(&com_port->dll, CONFIG_DEBUG_UART_SHIFT,
270 baud_divisor & 0xff);
271 serial_out_shift(&com_port->dlm, CONFIG_DEBUG_UART_SHIFT,
272 (baud_divisor >> 8) & 0xff);
273 serial_out_shift(&com_port->lcr, CONFIG_DEBUG_UART_SHIFT,
274 UART_LCRVAL);
Simon Glass21d00432015-01-26 18:27:09 -0700275}
276
277static inline void _debug_uart_putc(int ch)
278{
279 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
280
281 while (!(serial_in_shift(&com_port->lsr, 0) & UART_LSR_THRE))
282 ;
Simon Glassdd0b0122015-02-27 22:06:25 -0700283 serial_out_shift(&com_port->thr, CONFIG_DEBUG_UART_SHIFT, ch);
Simon Glass21d00432015-01-26 18:27:09 -0700284}
285
286DEBUG_UART_FUNCS
287
288#endif
289
Simon Glass12e431b2014-09-04 16:27:34 -0600290#ifdef CONFIG_DM_SERIAL
291static int ns16550_serial_putc(struct udevice *dev, const char ch)
292{
293 struct NS16550 *const com_port = dev_get_priv(dev);
294
295 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
296 return -EAGAIN;
297 serial_out(ch, &com_port->thr);
298
299 /*
300 * Call watchdog_reset() upon newline. This is done here in putc
301 * since the environment code uses a single puts() to print the complete
302 * environment upon "printenv". So we can't put this watchdog call
303 * in puts().
304 */
305 if (ch == '\n')
306 WATCHDOG_RESET();
307
308 return 0;
309}
310
311static int ns16550_serial_pending(struct udevice *dev, bool input)
312{
313 struct NS16550 *const com_port = dev_get_priv(dev);
314
315 if (input)
316 return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
317 else
318 return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
319}
320
321static int ns16550_serial_getc(struct udevice *dev)
322{
323 struct NS16550 *const com_port = dev_get_priv(dev);
324
Simon Glassaea2be22014-10-22 21:37:03 -0600325 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
Simon Glass12e431b2014-09-04 16:27:34 -0600326 return -EAGAIN;
327
328 return serial_in(&com_port->rbr);
329}
330
331static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
332{
333 struct NS16550 *const com_port = dev_get_priv(dev);
334 struct ns16550_platdata *plat = com_port->plat;
335 int clock_divisor;
336
337 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
338
339 NS16550_setbrg(com_port, clock_divisor);
340
341 return 0;
342}
343
344int ns16550_serial_probe(struct udevice *dev)
345{
346 struct NS16550 *const com_port = dev_get_priv(dev);
347
Simon Glass11c1a872014-10-22 21:37:05 -0600348 com_port->plat = dev_get_platdata(dev);
Simon Glass12e431b2014-09-04 16:27:34 -0600349 NS16550_init(com_port, -1);
350
351 return 0;
352}
353
Simon Glass11c1a872014-10-22 21:37:05 -0600354#ifdef CONFIG_OF_CONTROL
Simon Glass12e431b2014-09-04 16:27:34 -0600355int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
356{
Simon Glass12e431b2014-09-04 16:27:34 -0600357 struct ns16550_platdata *plat = dev->platdata;
358 fdt_addr_t addr;
359
Bin Meng3db886a2014-12-31 16:05:12 +0800360 /* try Processor Local Bus device first */
Simon Glass12e431b2014-09-04 16:27:34 -0600361 addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
Bin Meng3db886a2014-12-31 16:05:12 +0800362#ifdef CONFIG_PCI
363 if (addr == FDT_ADDR_T_NONE) {
364 /* then try pci device */
365 struct fdt_pci_addr pci_addr;
366 u32 bar;
367 int ret;
368
369 /* we prefer to use a memory-mapped register */
370 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
371 FDT_PCI_SPACE_MEM32, "reg",
372 &pci_addr);
373 if (ret) {
374 /* try if there is any i/o-mapped register */
375 ret = fdtdec_get_pci_addr(gd->fdt_blob,
376 dev->of_offset,
377 FDT_PCI_SPACE_IO,
378 "reg", &pci_addr);
379 if (ret)
380 return ret;
381 }
382
383 ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset,
384 &pci_addr, &bar);
385 if (ret)
386 return ret;
387
388 addr = bar;
389 }
390#endif
391
Simon Glass12e431b2014-09-04 16:27:34 -0600392 if (addr == FDT_ADDR_T_NONE)
393 return -EINVAL;
394
Simon Glass167efe02014-10-22 21:37:04 -0600395 plat->base = addr;
Simon Glass12e431b2014-09-04 16:27:34 -0600396 plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
397 "reg-shift", 1);
Simon Glass12e431b2014-09-04 16:27:34 -0600398
399 return 0;
400}
Simon Glass11c1a872014-10-22 21:37:05 -0600401#endif
Simon Glass12e431b2014-09-04 16:27:34 -0600402
403const struct dm_serial_ops ns16550_serial_ops = {
404 .putc = ns16550_serial_putc,
405 .pending = ns16550_serial_pending,
406 .getc = ns16550_serial_getc,
407 .setbrg = ns16550_serial_setbrg,
408};
409#endif /* CONFIG_DM_SERIAL */