blob: 75e114217b6a6d94ccd0a7ed7dc4483bb0e8aeca [file] [log] [blame]
Prabhakar Kushwaha7530d342012-04-24 20:17:15 +00001/*
2 * Copyright 2011-2012 Freescale Semiconductor, Inc.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Prabhakar Kushwaha7530d342012-04-24 20:17:15 +00005 */
6
7#include <common.h>
8#include <asm/processor.h>
9#include <asm/mmu.h>
10#include <asm/cache.h>
11#include <asm/immap_85xx.h>
12#include <asm/io.h>
13#include <miiphy.h>
14#include <libfdt.h>
15#include <fdt_support.h>
16#include <fsl_mdio.h>
17#include <tsec.h>
Ashish Kumar7ac1a242014-10-07 18:02:23 +053018#include <jffs2/load_kernel.h>
19#include <mtd_node.h>
20#include <flash.h>
Prabhakar Kushwaha7530d342012-04-24 20:17:15 +000021#include <netdev.h>
22
23
24DECLARE_GLOBAL_DATA_PTR;
25
26int board_early_init_f(void)
27{
28 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
29
30 clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_GPIO42);
31 setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_DSP_TMS);
32
33 clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_GPIO43);
34 setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_DSP_TCK |
35 MPC85xx_PMUXCR2_UART_CTS_B1_SIM_PD);
36 setbits_be32(&gur->halt_req_mask, HALTED_TO_HALT_REQ_MASK_0);
37 clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_IFC_AD_GPIO_MASK |
38 MPC85xx_PMUXCR_IFC_AD17_GPO_MASK,
39 MPC85xx_PMUXCR_IFC_AD_GPIO |
40 MPC85xx_PMUXCR_IFC_AD17_GPO | MPC85xx_PMUXCR_SDHC_USIM);
41
42 return 0;
43}
44
45int checkboard(void)
46{
47 struct cpu_type *cpu;
48
Simon Glass67ac13b2012-12-13 20:48:48 +000049 cpu = gd->arch.cpu;
Prabhakar Kushwaha7530d342012-04-24 20:17:15 +000050 printf("Board: %sRDB\n", cpu->name);
51
52 return 0;
53}
54
55#if defined(CONFIG_OF_BOARD_SETUP)
Ashish Kumar7ac1a242014-10-07 18:02:23 +053056#ifdef CONFIG_FDT_FIXUP_PARTITIONS
57struct node_info nodes[] = {
58 { "fsl,ifc-nand", MTD_DEV_TYPE_NAND, },
59};
60#endif
Simon Glasse895a4b2014-10-23 18:58:47 -060061int ft_board_setup(void *blob, bd_t *bd)
Prabhakar Kushwaha7530d342012-04-24 20:17:15 +000062{
63 phys_addr_t base;
64 phys_size_t size;
65
66 ft_cpu_setup(blob, bd);
67
68 base = getenv_bootm_low();
69 size = getenv_bootm_size();
70
71 fdt_fixup_memory(blob, (u64)base, (u64)size);
Ashish Kumar7ac1a242014-10-07 18:02:23 +053072#ifdef CONFIG_FDT_FIXUP_PARTITIONS
73 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
74#endif
Prabhakar Kushwaha7530d342012-04-24 20:17:15 +000075
76 fdt_fixup_dr_usb(blob, bd);
Simon Glasse895a4b2014-10-23 18:58:47 -060077
78 return 0;
Prabhakar Kushwaha7530d342012-04-24 20:17:15 +000079}
80#endif