blob: a8d0b972879cc46691955475b682366283e8edb2 [file] [log] [blame]
Igor Grinbergb09bf722014-11-05 14:25:35 +02001/*
2 * (C) Copyright 2013 CompuLab, Ltd.
3 * Author: Igor Grinberg <grinberg@compulab.co.il>
4 *
5 * Configuration settings for the CompuLab CM-T3517 board
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_OMAP /* in a TI OMAP core */
17#define CONFIG_CM_T3517 /* working with CM-T3517 */
18#define CONFIG_OMAP_COMMON
19#define CONFIG_SYS_GENERIC_BOARD
Nishanth Menonc6f90e12015-03-09 17:12:08 -050020/* Common ARM Erratas */
21#define CONFIG_ARM_ERRATA_454179
22#define CONFIG_ARM_ERRATA_430973
23#define CONFIG_ARM_ERRATA_621766
Igor Grinbergb09bf722014-11-05 14:25:35 +020024
25#define CONFIG_SYS_TEXT_BASE 0x80008000
26
27/*
28 * This is needed for the DMA stuff.
29 * Although the default iss 64, we still define it
30 * to be on the safe side once the default is changed.
31 */
32#define CONFIG_SYS_CACHELINE_SIZE 64
33
34#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
35
36#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menon987ec582015-03-09 17:12:04 -050037#include <asm/arch/omap.h>
Igor Grinbergb09bf722014-11-05 14:25:35 +020038
39/*
40 * Display CPU and Board information
41 */
42#define CONFIG_DISPLAY_CPUINFO
43#define CONFIG_DISPLAY_BOARDINFO
44
45/* Clock Defines */
46#define V_OSCK 26000000 /* Clock output from T2 */
47#define V_SCLK (V_OSCK >> 1)
48
49#define CONFIG_MISC_INIT_R
50
51#define CONFIG_OF_LIBFDT
52/*
53 * The early kernel mapping on ARM currently only maps from the base of DRAM
54 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
55 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
56 * so that leaves DRAM base to DRAM base + 0x4000 available.
57 */
58#define CONFIG_SYS_BOOTMAPSZ 0x4000
59
60#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
61#define CONFIG_SETUP_MEMORY_TAGS
62#define CONFIG_INITRD_TAG
63#define CONFIG_REVISION_TAG
64#define CONFIG_SERIAL_TAG
65
66/*
67 * Size of malloc() pool
68 */
69#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
70#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
71
72/*
73 * Hardware drivers
74 */
75
76/*
77 * NS16550 Configuration
78 */
79#define CONFIG_SYS_NS16550
80#define CONFIG_SYS_NS16550_SERIAL
81#define CONFIG_SYS_NS16550_REG_SIZE (-4)
82#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
83
84/*
85 * select serial console configuration
86 */
87#define CONFIG_CONS_INDEX 3
88#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
89#define CONFIG_SERIAL3 3 /* UART3 */
90#define CONFIG_SYS_CONSOLE_IS_IN_ENV
91
92/* allow to overwrite serial and ethaddr */
93#define CONFIG_ENV_OVERWRITE
94#define CONFIG_BAUDRATE 115200
95#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
96 115200}
97
98#define CONFIG_OMAP_GPIO
99
100#define CONFIG_GENERIC_MMC
101#define CONFIG_MMC
102#define CONFIG_OMAP_HSMMC
103#define CONFIG_DOS_PARTITION
104
Igor Grinberg011f5c12014-11-03 11:32:25 +0200105/* USB */
106#define CONFIG_USB_MUSB_AM35X
107
108#ifndef CONFIG_USB_MUSB_AM35X
109#define CONFIG_USB_OMAP3
110#define CONFIG_USB_EHCI
111#define CONFIG_USB_EHCI_OMAP
112#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 146
113#define CONFIG_OMAP_EHCI_PHY2_RESET_GPIO 147
114#else /* !CONFIG_USB_MUSB_AM35X */
115#define CONFIG_MUSB_HOST
116#define CONFIG_MUSB_PIO_ONLY
117#endif /* CONFIG_USB_MUSB_AM35X */
118
119#define CONFIG_USB_STORAGE
120#define CONFIG_CMD_USB
121
Igor Grinbergb09bf722014-11-05 14:25:35 +0200122/* commands to include */
Igor Grinbergb09bf722014-11-05 14:25:35 +0200123#define CONFIG_CMD_CACHE
124#define CONFIG_CMD_EXT2 /* EXT2 Support */
125#define CONFIG_CMD_FAT /* FAT support */
126#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
127#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
128#define CONFIG_MTD_PARTITIONS
129#define MTDIDS_DEFAULT "nand0=nand"
130#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
131 "1920k(u-boot),256k(u-boot-env),"\
132 "4m(kernel),-(fs)"
133
134#define CONFIG_CMD_I2C /* I2C serial bus support */
135#define CONFIG_CMD_MMC /* MMC support */
136#define CONFIG_CMD_NAND /* NAND support */
Igor Grinberga8a78c72014-11-03 11:32:26 +0200137#define CONFIG_CMD_DHCP
138#define CONFIG_CMD_PING
Igor Grinbergb09bf722014-11-05 14:25:35 +0200139#define CONFIG_CMD_GPIO
140
Igor Grinbergb09bf722014-11-05 14:25:35 +0200141
142#define CONFIG_SYS_NO_FLASH
143#define CONFIG_SYS_I2C
144#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
145#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
146#define CONFIG_SYS_I2C_OMAP34XX
147#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
148#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
149#define CONFIG_SYS_I2C_EEPROM_BUS 0
150#define CONFIG_I2C_MULTI_BUS
151
152/*
153 * Board NAND Info.
154 */
155#define CONFIG_SYS_NAND_QUIET_TEST
156#define CONFIG_NAND_OMAP_GPMC
157#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
158 /* to access nand */
159#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
160 /* to access nand at */
161 /* CS0 */
162#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
163 /* devices */
164
165/* Environment information */
166#define CONFIG_BOOTDELAY 3
167#define CONFIG_ZERO_BOOTDELAY_CHECK
168
169#define CONFIG_EXTRA_ENV_SETTINGS \
170 "loadaddr=0x82000000\0" \
171 "baudrate=115200\0" \
172 "console=ttyO2,115200n8\0" \
173 "mpurate=auto\0" \
174 "vram=12M\0" \
175 "dvimode=1024x768MR-16@60\0" \
176 "defaultdisplay=dvi\0" \
177 "mmcdev=0\0" \
178 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
179 "mmcrootfstype=ext4\0" \
180 "nandroot=/dev/mtdblock4 rw\0" \
181 "nandrootfstype=ubifs\0" \
182 "mmcargs=setenv bootargs console=${console} " \
183 "mpurate=${mpurate} " \
184 "vram=${vram} " \
185 "omapfb.mode=dvi:${dvimode} " \
186 "omapdss.def_disp=${defaultdisplay} " \
187 "root=${mmcroot} " \
188 "rootfstype=${mmcrootfstype}\0" \
189 "nandargs=setenv bootargs console=${console} " \
190 "mpurate=${mpurate} " \
191 "vram=${vram} " \
192 "omapfb.mode=dvi:${dvimode} " \
193 "omapdss.def_disp=${defaultdisplay} " \
194 "root=${nandroot} " \
195 "rootfstype=${nandrootfstype}\0" \
196 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
197 "bootscript=echo Running bootscript from mmc ...; " \
198 "source ${loadaddr}\0" \
199 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
200 "mmcboot=echo Booting from mmc ...; " \
201 "run mmcargs; " \
202 "bootm ${loadaddr}\0" \
203 "nandboot=echo Booting from nand ...; " \
204 "run nandargs; " \
205 "nand read ${loadaddr} 2a0000 400000; " \
206 "bootm ${loadaddr}\0" \
207
208#define CONFIG_CMD_BOOTZ
209#define CONFIG_BOOTCOMMAND \
210 "mmc dev ${mmcdev}; if mmc rescan; then " \
211 "if run loadbootscript; then " \
212 "run bootscript; " \
213 "else " \
214 "if run loaduimage; then " \
215 "run mmcboot; " \
216 "else run nandboot; " \
217 "fi; " \
218 "fi; " \
219 "else run nandboot; fi"
220
221/*
222 * Miscellaneous configurable options
223 */
224#define CONFIG_AUTO_COMPLETE
225#define CONFIG_CMDLINE_EDITING
226#define CONFIG_TIMESTAMP
227#define CONFIG_SYS_AUTOLOAD "no"
228#define CONFIG_SYS_LONGHELP /* undef to save memory */
229#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
230#define CONFIG_SYS_PROMPT "CM-T3517 # "
231#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
232/* Print Buffer Size */
233#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
234 sizeof(CONFIG_SYS_PROMPT) + 16)
235#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
236/* Boot Argument Buffer Size */
237#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
238
239#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
240
241/*
242 * AM3517 has 12 GP timers, they can be driven by the system clock
243 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
244 * This rate is divided by a local divisor.
245 */
246#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
247#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
248#define CONFIG_SYS_HZ 1000
249
250/*-----------------------------------------------------------------------
251 * Physical Memory Map
252 */
253#define CONFIG_NR_DRAM_BANKS 1 /* CM-T3517 DRAM is only on CS0 */
254#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
255#define CONFIG_SYS_CS0_SIZE (256 << 20)
256
257/*-----------------------------------------------------------------------
258 * FLASH and environment organization
259 */
260
261/* **** PISMO SUPPORT *** */
262/* Monitor at start of flash */
263#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
264#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
265
266#define CONFIG_ENV_IS_IN_NAND
267#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
268#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
269#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
270
Igor Grinberga8a78c72014-11-03 11:32:26 +0200271#if defined(CONFIG_CMD_NET)
272#define CONFIG_DRIVER_TI_EMAC
273#define CONFIG_DRIVER_TI_EMAC_USE_RMII
274#define CONFIG_MII
275#define CONFIG_SMC911X
276#define CONFIG_SMC911X_32_BIT
277#define CONFIG_SMC911X_BASE (0x2C000000 + (16 << 20))
278#endif /* CONFIG_CMD_NET */
279
Igor Grinbergb09bf722014-11-05 14:25:35 +0200280/* additions for new relocation code, must be added to all boards */
281#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
282#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
283#define CONFIG_SYS_INIT_RAM_SIZE 0x800
284#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
285 CONFIG_SYS_INIT_RAM_SIZE - \
286 GENERATED_GBL_DATA_SIZE)
287
288/* Status LED */
289#define CONFIG_STATUS_LED /* Status LED enabled */
290#define CONFIG_BOARD_SPECIFIC_LED
291#define CONFIG_GPIO_LED
292#define GREEN_LED_GPIO 186 /* CM-T3517 Green LED is GPIO186 */
293#define GREEN_LED_DEV 0
294#define STATUS_LED_BIT GREEN_LED_GPIO
295#define STATUS_LED_STATE STATUS_LED_ON
296#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
297#define STATUS_LED_BOOT GREEN_LED_DEV
298
299/* GPIO banks */
300#ifdef CONFIG_STATUS_LED
301#define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
302#endif
303
Igor Grinberg40bbd522014-11-03 11:32:27 +0200304/* Display Configuration */
305#define CONFIG_OMAP3_GPIO_2
306#define CONFIG_OMAP3_GPIO_5
307#define CONFIG_VIDEO_OMAP3
308#define LCD_BPP LCD_COLOR16
309
310#define CONFIG_LCD
311#define CONFIG_SPLASH_SCREEN
312#define CONFIG_SPLASHIMAGE_GUARD
313#define CONFIG_CMD_BMP
314#define CONFIG_BMP_16BPP
315#define CONFIG_SCF0403_LCD
316
317#define CONFIG_OMAP3_SPI
318
Igor Grinbergb09bf722014-11-05 14:25:35 +0200319#endif /* __CONFIG_H */