blob: 8c6e8536b69faf8e7fb51ac093450c4f87263829 [file] [log] [blame]
Jernej Skrabec750cabc2021-01-06 18:02:56 +01001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2// Copyright (C) 2020 Ondrej Jirman <megous@megous.com>
3// Copyright (C) 2020 Clément Péron <peron.clem@gmail.com>
4
5/ {
6 cpu_opp_table: cpu-opp-table {
7 compatible = "allwinner,sun50i-h6-operating-points";
8 nvmem-cells = <&cpu_speed_grade>;
9 opp-shared;
10
Andre Przywara127e57c2021-05-25 01:20:25 +010011 opp-480000000 {
Jernej Skrabec750cabc2021-01-06 18:02:56 +010012 clock-latency-ns = <244144>; /* 8 32k periods */
13 opp-hz = /bits/ 64 <480000000>;
14
15 opp-microvolt-speed0 = <880000 880000 1200000>;
16 opp-microvolt-speed1 = <820000 820000 1200000>;
17 opp-microvolt-speed2 = <820000 820000 1200000>;
18 };
19
Andre Przywara127e57c2021-05-25 01:20:25 +010020 opp-720000000 {
Jernej Skrabec750cabc2021-01-06 18:02:56 +010021 clock-latency-ns = <244144>; /* 8 32k periods */
22 opp-hz = /bits/ 64 <720000000>;
23
24 opp-microvolt-speed0 = <880000 880000 1200000>;
25 opp-microvolt-speed1 = <820000 820000 1200000>;
26 opp-microvolt-speed2 = <820000 820000 1200000>;
27 };
28
Andre Przywara127e57c2021-05-25 01:20:25 +010029 opp-816000000 {
Jernej Skrabec750cabc2021-01-06 18:02:56 +010030 clock-latency-ns = <244144>; /* 8 32k periods */
31 opp-hz = /bits/ 64 <816000000>;
32
33 opp-microvolt-speed0 = <880000 880000 1200000>;
34 opp-microvolt-speed1 = <820000 820000 1200000>;
35 opp-microvolt-speed2 = <820000 820000 1200000>;
36 };
37
Andre Przywara127e57c2021-05-25 01:20:25 +010038 opp-888000000 {
Jernej Skrabec750cabc2021-01-06 18:02:56 +010039 clock-latency-ns = <244144>; /* 8 32k periods */
40 opp-hz = /bits/ 64 <888000000>;
41
42 opp-microvolt-speed0 = <880000 880000 1200000>;
43 opp-microvolt-speed1 = <820000 820000 1200000>;
44 opp-microvolt-speed2 = <820000 820000 1200000>;
45 };
46
Andre Przywara127e57c2021-05-25 01:20:25 +010047 opp-1080000000 {
Jernej Skrabec750cabc2021-01-06 18:02:56 +010048 clock-latency-ns = <244144>; /* 8 32k periods */
49 opp-hz = /bits/ 64 <1080000000>;
50
51 opp-microvolt-speed0 = <940000 940000 1200000>;
52 opp-microvolt-speed1 = <880000 880000 1200000>;
53 opp-microvolt-speed2 = <880000 880000 1200000>;
54 };
55
Andre Przywara127e57c2021-05-25 01:20:25 +010056 opp-1320000000 {
Jernej Skrabec750cabc2021-01-06 18:02:56 +010057 clock-latency-ns = <244144>; /* 8 32k periods */
58 opp-hz = /bits/ 64 <1320000000>;
59
60 opp-microvolt-speed0 = <1000000 1000000 1200000>;
61 opp-microvolt-speed1 = <940000 940000 1200000>;
62 opp-microvolt-speed2 = <940000 940000 1200000>;
63 };
64
Andre Przywara127e57c2021-05-25 01:20:25 +010065 opp-1488000000 {
Jernej Skrabec750cabc2021-01-06 18:02:56 +010066 clock-latency-ns = <244144>; /* 8 32k periods */
67 opp-hz = /bits/ 64 <1488000000>;
68
69 opp-microvolt-speed0 = <1060000 1060000 1200000>;
70 opp-microvolt-speed1 = <1000000 1000000 1200000>;
71 opp-microvolt-speed2 = <1000000 1000000 1200000>;
72 };
73
Andre Przywara127e57c2021-05-25 01:20:25 +010074 opp-1608000000 {
Jernej Skrabec750cabc2021-01-06 18:02:56 +010075 clock-latency-ns = <244144>; /* 8 32k periods */
76 opp-hz = /bits/ 64 <1608000000>;
77
78 opp-microvolt-speed0 = <1090000 1090000 1200000>;
79 opp-microvolt-speed1 = <1030000 1030000 1200000>;
80 opp-microvolt-speed2 = <1030000 1030000 1200000>;
81 };
82
Andre Przywara127e57c2021-05-25 01:20:25 +010083 opp-1704000000 {
Jernej Skrabec750cabc2021-01-06 18:02:56 +010084 clock-latency-ns = <244144>; /* 8 32k periods */
85 opp-hz = /bits/ 64 <1704000000>;
86
87 opp-microvolt-speed0 = <1120000 1120000 1200000>;
88 opp-microvolt-speed1 = <1060000 1060000 1200000>;
89 opp-microvolt-speed2 = <1060000 1060000 1200000>;
90 };
91
Andre Przywara127e57c2021-05-25 01:20:25 +010092 opp-1800000000 {
Jernej Skrabec750cabc2021-01-06 18:02:56 +010093 clock-latency-ns = <244144>; /* 8 32k periods */
94 opp-hz = /bits/ 64 <1800000000>;
95
96 opp-microvolt-speed0 = <1160000 1160000 1200000>;
97 opp-microvolt-speed1 = <1100000 1100000 1200000>;
98 opp-microvolt-speed2 = <1100000 1100000 1200000>;
99 };
100 };
101};
102
103&cpu0 {
104 operating-points-v2 = <&cpu_opp_table>;
105};
106
107&cpu1 {
108 operating-points-v2 = <&cpu_opp_table>;
109};
110
111&cpu2 {
112 operating-points-v2 = <&cpu_opp_table>;
113};
114
115&cpu3 {
116 operating-points-v2 = <&cpu_opp_table>;
117};