Enric Balletbò i Serra | 9d1b298 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_TARGET_AM335X_SL50=y | ||||
3 | CONFIG_SPL=y | ||||
4 | CONFIG_SPL_STACK_R=y | ||||
5 | CONFIG_SPL_STACK_R_ADDR=0x82000000 | ||||
6 | CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" | ||||
Enric Balletbò i Serra | 9d1b298 | 2015-09-07 07:43:20 +0200 | [diff] [blame] | 7 | # CONFIG_CMD_IMLS is not set |
8 | # CONFIG_CMD_FLASH is not set | ||||
9 | # CONFIG_CMD_SETEXPR is not set |