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Daniel Hellstrom823edd82008-03-28 10:06:52 +01001/* Configuration header file for LEON3 GRSIM, trying to be similar
2 * to Gaisler's GR-XC3S-1500 board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom823edd82008-03-28 10:06:52 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 *
20 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
21 *
Francois Retiefb6b280c2014-11-04 16:51:44 +020022 * TSIM command:
23 * $ tsim-leon3 -sdram 32768 -ram 4096 -rom 2048 -mmu -cas
Daniel Hellstrom823edd82008-03-28 10:06:52 +010024 *
Francois Retiefb6b280c2014-11-04 16:51:44 +020025 * In the evaluation version of TSIM, the -sdram/-ram/-rom arguments are
26 * hard-coded to these values and need not be specified. (see below)
27 *
28 * Get TSIM from http://www.gaisler.com/index.php/downloads/simulators
Daniel Hellstrom823edd82008-03-28 10:06:52 +010029 */
30
Daniel Hellstrom823edd82008-03-28 10:06:52 +010031#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
32#define CONFIG_TSIM 1 /* ... running on TSIM */
33
34/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020035#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010036
Daniel Hellstrom823edd82008-03-28 10:06:52 +010037/*
38 * Serial console configuration
39 */
40#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020041#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom823edd82008-03-28 10:06:52 +010042
43/* Partitions */
44#define CONFIG_DOS_PARTITION
45#define CONFIG_MAC_PARTITION
46#define CONFIG_ISO_PARTITION
47
48/*
49 * Supported commands
50 */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010051#define CONFIG_CMD_DIAG
Siva Durga Prasad Paladugu64e809a2014-03-14 16:35:38 +053052#define CONFIG_CMD_FPGA_LOADMK
Daniel Hellstrom823edd82008-03-28 10:06:52 +010053#define CONFIG_CMD_IRQ
Daniel Hellstrom823edd82008-03-28 10:06:52 +010054#define CONFIG_CMD_REGINFO
Daniel Hellstrom823edd82008-03-28 10:06:52 +010055
56/*
57 * Autobooting
58 */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010059
60#define CONFIG_PREBOOT "echo;" \
61 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
62 "echo"
63
64#undef CONFIG_BOOTARGS
Daniel Hellstrom823edd82008-03-28 10:06:52 +010065
66#define CONFIG_EXTRA_ENV_SETTINGS \
67 "netdev=eth0\0" \
68 "nfsargs=setenv bootargs root=/dev/nfs rw " \
69 "nfsroot=${serverip}:${rootpath}\0" \
70 "ramargs=setenv bootargs root=/dev/ram rw\0" \
71 "addip=setenv bootargs ${bootargs} " \
72 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
73 ":${hostname}:${netdev}:off panic=1\0" \
74 "flash_nfs=run nfsargs addip;" \
75 "bootm ${kernel_addr}\0" \
76 "flash_self=run ramargs addip;" \
77 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
78 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
79 "rootpath=/export/roofs\0" \
80 "scratch=40000000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000081 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom823edd82008-03-28 10:06:52 +010082 "bootargs=console=ttyS0,38400" \
83 ""
84#define CONFIG_NETMASK 255.255.255.0
85#define CONFIG_GATEWAYIP 192.168.0.1
86#define CONFIG_SERVERIP 192.168.0.81
87#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger8b3637c2011-10-13 13:03:47 +000088#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom823edd82008-03-28 10:06:52 +010089#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +000090#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom823edd82008-03-28 10:06:52 +010091
92#define CONFIG_BOOTCOMMAND "run flash_self"
93
94/* Memory MAP
95 *
96 * Flash:
97 * |--------------------------------|
98 * | 0x00000000 Text & Data & BSS | *
99 * | for Monitor | *
100 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
101 * | UNUSED / Growth | * 256kb
102 * |--------------------------------|
103 * | 0x00050000 Base custom area | *
104 * | kernel / FS | *
105 * | | * Rest of Flash
106 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
107 * | END-0x00008000 Environment | * 32kb
108 * |--------------------------------|
109 *
110 *
111 *
112 * Main Memory:
113 * |--------------------------------|
114 * | UNUSED / scratch area |
115 * | |
116 * | |
117 * | |
118 * | |
119 * |--------------------------------|
120 * | Monitor .Text / .DATA / .BSS | * 256kb
121 * | Relocated! | *
122 * |--------------------------------|
123 * | Monitor Malloc | * 128kb (contains relocated environment)
124 * |--------------------------------|
125 * | Monitor/kernel STACK | * 64kb
126 * |--------------------------------|
127 * | Page Table for MMU systems | * 2k
128 * |--------------------------------|
129 * | PROM Code accessed from Linux | * 6kb-128b
130 * |--------------------------------|
131 * | Global data (avail from kernel)| * 128b
132 * |--------------------------------|
133 *
134 */
135
136/*
137 * Flash configuration (8,16 or 32 MB)
138 * TEXT base always at 0xFFF00000
139 * ENV_ADDR always at 0xFFF40000
140 * FLASH_BASE at 0xFC000000 for 64 MB
141 * 0xFE000000 for 32 MB
142 * 0xFF000000 for 16 MB
143 * 0xFF800000 for 8 MB
144 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145#define CONFIG_SYS_NO_FLASH 1
146#define CONFIG_SYS_FLASH_BASE 0x00000000
147#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200148#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100149
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100151
152#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
154#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100155
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
157#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
158#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
159#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100160
161#ifdef ENABLE_FLASH_SUPPORT
162/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100164
165#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
166
167/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200169#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100171#endif
172
173/*
174 * Environment settings
175 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200176#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200177/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200178/*#define CONFIG_ENV_SIZE 0x8000*/
179#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100180#define CONFIG_ENV_OVERWRITE 1
181
182/*
183 * Memory map
184 */
Francois Retiefb6b280c2014-11-04 16:51:44 +0200185#define CONFIG_SYS_SDRAM_BASE 0x60000000
186#define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32MiB SDRAM */
187#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100188
Francois Retiefb6b280c2014-11-04 16:51:44 +0200189#define CONFIG_SYS_SRAM_BASE 0x40000000
190#define CONFIG_SYS_SRAM_SIZE 0x00400000 /* 4MiB SRAM */
191#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100192
193/* Always Run U-Boot from SDRAM */
Francois Retiefb6b280c2014-11-04 16:51:44 +0200194#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
195#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
196#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100197
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200198#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100199
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200200#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200201#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100202
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
204#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100205
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200206#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200207#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
208# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100209#endif
210
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
212#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
213#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100214
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200215#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
216#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100217
218/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200219#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
220#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100221
222/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200223#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100224
Francois Retiefb6b280c2014-11-04 16:51:44 +0200225#ifdef CONFIG_CMD_NET
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100226/*
227 * Ethernet configuration
228 */
229#define CONFIG_GRETH 1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100230
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100231/*
232 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
233 */
234/* #define CONFIG_GRETH_10MBIT 1 */
235#define CONFIG_PHY_ADDR 0x00
236
Francois Retiefb6b280c2014-11-04 16:51:44 +0200237#endif /* CONFIG_CMD_NET */
238
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100239/*
240 * Miscellaneous configurable options
241 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200242#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100243#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200244#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100245#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200246#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100247#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200248#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
249#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
250#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100251
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200252#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
253#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100254
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200255#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100256
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100257/***** Gaisler GRLIB IP-Cores Config ********/
258
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200259#define CONFIG_SYS_GRLIB_SDRAM 0
Francois Retiefb6b280c2014-11-04 16:51:44 +0200260
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200261#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100262
263/* No SDRAM Configuration */
264#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
265
266/* LEON2 MCTRL configuration */
267#define CONFIG_SYS_GRLIB_ESA_MCTRL1
268#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100269#if CONFIG_GRSIM
270/* GRSIM configuration */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100271#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100272#else
273/* TSIM configuration */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100274#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x81805220
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100275#endif
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100276#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100277
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100278/* GRLIB FT-MCTRL configuration */
279#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
280#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
281#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
282#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100283
284/* no DDR controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100285#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100286
287/* no DDR2 Controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100288#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100289
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100290/* default kernel command line */
291#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
292
Francois Retiefb6b280c2014-11-04 16:51:44 +0200293/* TSIM command:
294 * $ ./tsim-leon3 -mmu -cas
295 *
296 * This TSIM evaluation version will expire 2015-04-02
297 *
298 *
299 * TSIM/LEON3 SPARC simulator, version 2.0.35 (evaluation version)
300 *
301 * Copyright (C) 2014, Aeroflex Gaisler - all rights reserved.
302 * This software may only be used with a valid license.
303 * For latest updates, go to http://www.gaisler.com/
304 * Comments or bug-reports to support@gaisler.com
305 *
306 * serial port A on stdin/stdout
307 * allocated 4096 K SRAM memory, in 1 bank
308 * allocated 32 M SDRAM memory, in 1 bank
309 * allocated 2048 K ROM memory
310 * icache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
311 * dcache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
312 * tsim> leon
313 * 0x80000000 Memory configuration register 1 0x000002ff
314 * 0x80000004 Memory configuration register 2 0x81805220
315 * 0x80000008 Memory configuration register 3 0x00000000
316 */
317
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100318#endif /* __CONFIG_H */