huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2015 Rockchip Electronics Co., Ltd |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | #ifndef __CONFIG_RK3036_COMMON_H |
| 7 | #define __CONFIG_RK3036_COMMON_H |
| 8 | |
| 9 | #include <asm/arch/hardware.h> |
Jacob Chen | 7f35bbb | 2016-10-08 13:47:41 +0800 | [diff] [blame] | 10 | #include "rockchip-common.h" |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 11 | |
| 12 | #define CONFIG_SYS_NO_FLASH |
| 13 | #define CONFIG_NR_DRAM_BANKS 1 |
| 14 | #define CONFIG_ENV_IS_NOWHERE |
| 15 | #define CONFIG_ENV_SIZE 0x2000 |
| 16 | #define CONFIG_SYS_MAXARGS 16 |
| 17 | #define CONFIG_BAUDRATE 115200 |
| 18 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) |
| 19 | #define CONFIG_SYS_CBSIZE 1024 |
| 20 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 21 | #define CONFIG_SYS_THUMB_BUILD |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 22 | |
| 23 | #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) |
| 24 | #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ |
| 25 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) |
| 26 | |
| 27 | #define CONFIG_SYS_NS16550 |
| 28 | #define CONFIG_SYS_NS16550_MEM32 |
| 29 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 30 | #define CONFIG_SYS_TEXT_BASE 0x60000000 |
| 31 | #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 |
| 32 | #define CONFIG_SYS_LOAD_ADDR 0x60800800 |
| 33 | #define CONFIG_SPL_STACK 0x10081fff |
| 34 | #define CONFIG_SPL_TEXT_BASE 0x10081004 |
| 35 | |
| 36 | #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) |
| 37 | #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" |
| 38 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 39 | /* MMC/SD IP block */ |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 40 | #define CONFIG_GENERIC_MMC |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 41 | #define CONFIG_BOUNCE_BUFFER |
| 42 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 43 | #define CONFIG_FAT_WRITE |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 44 | #define CONFIG_PARTITION_UUIDS |
| 45 | #define CONFIG_CMD_PART |
| 46 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 47 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
| 48 | #define CONFIG_NR_DRAM_BANKS 1 |
| 49 | #define SDRAM_BANK_SIZE (512UL << 20UL) |
| 50 | |
| 51 | #define CONFIG_SPI_FLASH |
| 52 | #define CONFIG_SPI |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 53 | #define CONFIG_SPI_FLASH_GIGADEVICE |
| 54 | #define CONFIG_SF_DEFAULT_SPEED 20000000 |
| 55 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 56 | #ifndef CONFIG_SPL_BUILD |
Xu Ziyuan | d2d763f | 2016-07-28 11:42:34 +0800 | [diff] [blame] | 57 | /* usb otg */ |
| 58 | #define CONFIG_USB_GADGET |
| 59 | #define CONFIG_USB_GADGET_DUALSPEED |
| 60 | #define CONFIG_USB_GADGET_DWC2_OTG |
| 61 | #define CONFIG_USB_GADGET_VBUS_DRAW 0 |
| 62 | |
| 63 | /* fastboot */ |
| 64 | #define CONFIG_CMD_FASTBOOT |
| 65 | #define CONFIG_USB_FUNCTION_FASTBOOT |
| 66 | #define CONFIG_FASTBOOT_FLASH |
| 67 | #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 |
| 68 | #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR |
| 69 | #define CONFIG_FASTBOOT_BUF_SIZE 0x08000000 |
| 70 | |
jacob2.chen | e73e5fc | 2016-08-30 01:26:14 +0800 | [diff] [blame] | 71 | /* usb mass storage */ |
| 72 | #define CONFIG_USB_FUNCTION_MASS_STORAGE |
| 73 | #define CONFIG_CMD_USB_MASS_STORAGE |
| 74 | |
Xu Ziyuan | d2d763f | 2016-07-28 11:42:34 +0800 | [diff] [blame] | 75 | #define CONFIG_USB_GADGET_DOWNLOAD |
| 76 | #define CONFIG_G_DNL_MANUFACTURER "Rockchip" |
| 77 | #define CONFIG_G_DNL_VENDOR_NUM 0x2207 |
| 78 | #define CONFIG_G_DNL_PRODUCT_NUM 0x310a |
| 79 | |
Kever Yang | 1e35212 | 2016-11-08 18:13:39 +0800 | [diff] [blame] | 80 | /* usb host */ |
| 81 | #ifdef CONFIG_CMD_USB |
| 82 | #define CONFIG_USB_DWC2 |
| 83 | #define CONFIG_USB_HOST_ETHER |
| 84 | #define CONFIG_USB_ETHER_SMSC95XX |
| 85 | #define CONFIG_USB_ETHER_ASIX |
| 86 | #endif |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 87 | #define ENV_MEM_LAYOUT_SETTINGS \ |
| 88 | "scriptaddr=0x60000000\0" \ |
| 89 | "pxefile_addr_r=0x60100000\0" \ |
| 90 | "fdt_addr_r=0x61f00000\0" \ |
| 91 | "kernel_addr_r=0x62000000\0" \ |
| 92 | "ramdisk_addr_r=0x64000000\0" |
| 93 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 94 | #include <config_distro_bootcmd.h> |
| 95 | |
| 96 | /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board, |
| 97 | * so limit the fdt reallocation to that */ |
| 98 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 99 | "fdt_high=0x7fffffff\0" \ |
Jacob Chen | 73a8598 | 2016-09-19 18:46:25 +0800 | [diff] [blame] | 100 | "partitions=" PARTS_DEFAULT \ |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 101 | ENV_MEM_LAYOUT_SETTINGS \ |
| 102 | BOOTENV |
| 103 | #endif |
| 104 | |
Jacob Chen | 67171e1 | 2016-09-19 18:46:28 +0800 | [diff] [blame] | 105 | #define CONFIG_PREBOOT |
| 106 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 107 | #endif |