blob: a755e2650161c1e62252cb1b4d807e720df3ccea [file] [log] [blame]
Peng Fanf77d4412018-10-18 14:28:30 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2018 NXP
4 * Peng Fan <peng.fan@nxp.com>
5 */
6
7#include <common.h>
8#include <clk-uclass.h>
9#include <dm.h>
10#include <asm/arch/sci/sci.h>
11#include <asm/arch/clock.h>
12#include <dt-bindings/clock/imx8qxp-clock.h>
13#include <dt-bindings/soc/imx_rsrc.h>
14#include <misc.h>
15
Peng Fan98c63a72019-03-05 02:32:33 +000016#include "clk-imx8.h"
Peng Fanf77d4412018-10-18 14:28:30 +020017
Peng Fan98c63a72019-03-05 02:32:33 +000018__weak ulong imx8_clk_get_rate(struct clk *clk)
Peng Fanf77d4412018-10-18 14:28:30 +020019{
Peng Fanf77d4412018-10-18 14:28:30 +020020 return 0;
21}
22
Peng Fan98c63a72019-03-05 02:32:33 +000023__weak ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate)
24{
25 return 0;
26}
27
28__weak int __imx8_clk_enable(struct clk *clk, bool enable)
29{
30 return -ENOTSUPP;
31}
32
Peng Fanf77d4412018-10-18 14:28:30 +020033static int imx8_clk_disable(struct clk *clk)
34{
35 return __imx8_clk_enable(clk, 0);
36}
37
38static int imx8_clk_enable(struct clk *clk)
39{
40 return __imx8_clk_enable(clk, 1);
41}
42
43#if CONFIG_IS_ENABLED(CMD_CLK)
44int soc_clk_dump(void)
45{
46 struct udevice *dev;
47 struct clk clk;
48 unsigned long rate;
49 int i, ret;
50
51 ret = uclass_get_device_by_driver(UCLASS_CLK,
52 DM_GET_DRIVER(imx8_clk), &dev);
53 if (ret)
54 return ret;
55
56 printf("Clk\t\tHz\n");
57
Peng Fan98c63a72019-03-05 02:32:33 +000058 for (i = 0; i < num_clks; i++) {
Peng Fanf77d4412018-10-18 14:28:30 +020059 clk.id = imx8_clk_names[i].id;
60 ret = clk_request(dev, &clk);
61 if (ret < 0) {
62 debug("%s clk_request() failed: %d\n", __func__, ret);
63 continue;
64 }
65
66 ret = clk_get_rate(&clk);
67 rate = ret;
68
69 clk_free(&clk);
70
71 if (ret == -ENOTSUPP) {
72 printf("clk ID %lu not supported yet\n",
73 imx8_clk_names[i].id);
74 continue;
75 }
76 if (ret < 0) {
77 printf("%s %lu: get_rate err: %d\n",
78 __func__, imx8_clk_names[i].id, ret);
79 continue;
80 }
81
82 printf("%s(%3lu):\t%lu\n",
83 imx8_clk_names[i].name, imx8_clk_names[i].id, rate);
84 }
85
86 return 0;
87}
88#endif
89
90static struct clk_ops imx8_clk_ops = {
91 .set_rate = imx8_clk_set_rate,
92 .get_rate = imx8_clk_get_rate,
93 .enable = imx8_clk_enable,
94 .disable = imx8_clk_disable,
95};
96
97static int imx8_clk_probe(struct udevice *dev)
98{
99 return 0;
100}
101
102static const struct udevice_id imx8_clk_ids[] = {
103 { .compatible = "fsl,imx8qxp-clk" },
Peng Fane45efe92019-03-05 02:32:35 +0000104 { .compatible = "fsl,imx8qm-clk" },
Peng Fanf77d4412018-10-18 14:28:30 +0200105 { },
106};
107
108U_BOOT_DRIVER(imx8_clk) = {
109 .name = "clk_imx8",
110 .id = UCLASS_CLK,
111 .of_match = imx8_clk_ids,
112 .ops = &imx8_clk_ops,
113 .probe = imx8_clk_probe,
114 .flags = DM_FLAG_PRE_RELOC,
115};