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wdenk0db5bca2003-03-31 17:27:09 +00001/*
2 * (C) Copyright 2003
3 * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
wdenk8bde7f72003-06-27 21:31:46 +000020 * Foundation,
wdenk0db5bca2003-03-31 17:27:09 +000021 */
22
23/*
24 * File: cpu.c
wdenk8bde7f72003-06-27 21:31:46 +000025 *
26 * Discription: Some cpu specific function for watchdog,
wdenk0db5bca2003-03-31 17:27:09 +000027 * cpu version test, clock setting ...
wdenk8bde7f72003-06-27 21:31:46 +000028 *
wdenk0db5bca2003-03-31 17:27:09 +000029 */
30
31
32#include <common.h>
33#include <watchdog.h>
34#include <command.h>
35#include <mpc5xx.h>
36
37
38#if (defined(CONFIG_MPC555))
39# define ID_STR "MPC555/556"
40
41/*
42 * Check version of cpu with Processor Version Register (PVR)
43 */
44static int check_cpu_version (long clock, uint pvr, uint immr)
45{
46 char buf[32];
47 /* The highest 16 bits should be 0x0002 for a MPC555/556 */
48 if ((pvr >> 16) == 0x0002) {
49 printf (" " ID_STR " Version %x", (pvr >> 16));
50 printf (" at %s MHz:", strmhz (buf, clock));
51 } else {
52 printf ("Not supported cpu version");
53 return -1;
54 }
55 return 0;
56}
57#endif /* CONFIG_MPC555 */
58
59
60/*
61 * Check version of mpc5xx
62 */
63int checkcpu (void)
64{
65 DECLARE_GLOBAL_DATA_PTR;
66
67 ulong clock = gd->cpu_clk;
68 uint immr = get_immr (0); /* Return full IMMR contents */
69 uint pvr = get_pvr (); /* Retrieve PVR register */
70
71 puts ("CPU: ");
72
73 return check_cpu_version (clock, pvr, immr);
74}
75
76/*
wdenk8bde7f72003-06-27 21:31:46 +000077 * Called by macro WATCHDOG_RESET
wdenk0db5bca2003-03-31 17:27:09 +000078 */
79#if defined(CONFIG_WATCHDOG)
80void watchdog_reset (void)
81{
82 int re_enable = disable_interrupts ();
83
84 reset_5xx_watchdog ((immap_t *) CFG_IMMR);
85 if (re_enable)
86 enable_interrupts ();
87}
88
89/*
90 * Will clear software reset
91 */
92void reset_5xx_watchdog (volatile immap_t * immr)
93{
94 /* Use the MPC5xx Internal Watchdog */
95 immr->im_siu_conf.sc_swsr = 0x556c; /* Prevent SW time-out */
wdenk8bde7f72003-06-27 21:31:46 +000096 immr->im_siu_conf.sc_swsr = 0xaa39;
wdenk0db5bca2003-03-31 17:27:09 +000097}
98
99#endif /* CONFIG_WATCHDOG */
100
101
102/*
103 * Get timebase clock frequency
104 */
105unsigned long get_tbclk (void)
106{
107 DECLARE_GLOBAL_DATA_PTR;
108 volatile immap_t *immr = (volatile immap_t *) CFG_IMMR;
109 ulong oscclk, factor;
110
111 if (immr->im_clkrst.car_sccr & SCCR_TBS) {
112 return (gd->cpu_clk / 16);
113 }
114
115 factor = (((CFG_PLPRCR) & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT) + 1;
116
117 oscclk = gd->cpu_clk / factor;
118
119 if ((immr->im_clkrst.car_sccr & SCCR_RTSEL) == 0 || factor > 2) {
120 return (oscclk / 4);
121 }
122 return (oscclk / 16);
123}
124
125
126/*
wdenk8bde7f72003-06-27 21:31:46 +0000127 * Reset board
wdenk0db5bca2003-03-31 17:27:09 +0000128 */
129int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
130{
131 ulong addr;
wdenk8bde7f72003-06-27 21:31:46 +0000132
wdenk0db5bca2003-03-31 17:27:09 +0000133 /* Interrupts off, enable reset */
wdenk8bde7f72003-06-27 21:31:46 +0000134 __asm__ volatile (" mtspr 81, %r0 \n\t"
wdenkcceb8712003-06-23 18:12:28 +0000135 " mfmsr %r3 \n\t"
136 " rlwinm %r31,%r3,0,25,23\n\t"
137 " mtmsr %r31 \n\t");
wdenk8bde7f72003-06-27 21:31:46 +0000138 /*
139 * Trying to execute the next instruction at a non-existing address
140 * should cause a machine check, resulting in reset
141 */
wdenk0db5bca2003-03-31 17:27:09 +0000142#ifdef CFG_RESET_ADDRESS
wdenk8bde7f72003-06-27 21:31:46 +0000143 addr = CFG_RESET_ADDRESS;
wdenk0db5bca2003-03-31 17:27:09 +0000144#else
wdenk8bde7f72003-06-27 21:31:46 +0000145 /*
146 * note: when CFG_MONITOR_BASE points to a RAM address, CFG_MONITOR_BASE * - sizeof (ulong) is usually a valid address. Better pick an address
147 * known to be invalid on your system and assign it to CFG_RESET_ADDRESS.
148 * "(ulong)-1" used to be a good choice for many systems...
149 */
150 addr = CFG_MONITOR_BASE - sizeof (ulong);
wdenk0db5bca2003-03-31 17:27:09 +0000151#endif
152 ((void (*) (void)) addr) ();
153 return 1;
154}