blob: 5e6d854065b18ba7613c6e33dd04b99f9af375db [file] [log] [blame]
Marek Vasut910df4d2017-09-15 21:13:55 +02001if ARCH_RMOBILE
2
3config PINCTRL_PFC
4 bool "Renesas pin control drivers"
5 depends on DM && ARCH_RMOBILE
6 help
7 Enable support for clock present on Renesas RCar SoCs.
8
Marek Vasut7547ad42018-01-17 22:18:59 +01009config PINCTRL_PFC_R8A7790
10 bool "Renesas RCar Gen2 R8A7790 pin control driver"
11 def_bool y if R8A7790
12 depends on PINCTRL_PFC
13 help
14 Support pin multiplexing control on Renesas RCar Gen3 R8A7790 SoCs.
15
16 The driver is controlled by a device tree node which contains both
17 the GPIO definitions and pin control functions for each available
18 multiplex function.
19
Marek Vasut427c75d2018-01-17 17:14:45 +010020config PINCTRL_PFC_R8A7791
21 bool "Renesas RCar Gen2 R8A7791 pin control driver"
22 def_bool y if R8A7791
23 depends on PINCTRL_PFC
24 help
25 Support pin multiplexing control on Renesas RCar Gen3 R8A7791 SoCs.
26
27 The driver is controlled by a device tree node which contains both
28 the GPIO definitions and pin control functions for each available
29 multiplex function.
30
Marek Vasutab2d09b42018-01-17 22:29:50 +010031config PINCTRL_PFC_R8A7792
32 bool "Renesas RCar Gen2 R8A7792 pin control driver"
33 def_bool y if R8A7792
34 depends on PINCTRL_PFC
35 help
36 Support pin multiplexing control on Renesas RCar Gen3 R8A7792 SoCs.
37
38 The driver is controlled by a device tree node which contains both
39 the GPIO definitions and pin control functions for each available
40 multiplex function.
41
Marek Vasut427c75d2018-01-17 17:14:45 +010042config PINCTRL_PFC_R8A7793
43 bool "Renesas RCar Gen2 R8A7793 pin control driver"
44 def_bool y if R8A7793
45 depends on PINCTRL_PFC
46 help
47 Support pin multiplexing control on Renesas RCar Gen3 R8A7793 SoCs.
48
49 The driver is controlled by a device tree node which contains both
50 the GPIO definitions and pin control functions for each available
51 multiplex function.
52
Marek Vasut34e93602018-01-17 22:33:59 +010053config PINCTRL_PFC_R8A7794
54 bool "Renesas RCar Gen2 R8A7794 pin control driver"
55 def_bool y if R8A7794
56 depends on PINCTRL_PFC
57 help
58 Support pin multiplexing control on Renesas RCar Gen3 R8A7794 SoCs.
59
60 The driver is controlled by a device tree node which contains both
61 the GPIO definitions and pin control functions for each available
62 multiplex function.
63
Marek Vasut910df4d2017-09-15 21:13:55 +020064config PINCTRL_PFC_R8A7795
65 bool "Renesas RCar Gen3 R8A7795 pin control driver"
66 def_bool y if R8A7795
67 depends on PINCTRL_PFC
68 help
69 Support pin multiplexing control on Renesas RCar Gen3 R8A7795 SoCs.
70
71 The driver is controlled by a device tree node which contains both
72 the GPIO definitions and pin control functions for each available
73 multiplex function.
74
75config PINCTRL_PFC_R8A7796
76 bool "Renesas RCar Gen3 R8A7796 pin control driver"
77 def_bool y if R8A7796
78 depends on PINCTRL_PFC
79 help
80 Support pin multiplexing control on Renesas RCar Gen3 R8A7796 SoCs.
81
82 The driver is controlled by a device tree node which contains both
83 the GPIO definitions and pin control functions for each available
84 multiplex function.
85
Marek Vasutc106bb52017-10-09 20:57:29 +020086config PINCTRL_PFC_R8A77970
87 bool "Renesas RCar Gen3 R8A77970 pin control driver"
88 def_bool y if R8A77970
89 depends on PINCTRL_PFC
90 help
91 Support pin multiplexing control on Renesas RCar Gen3 R8A77970 SoCs.
92
93 The driver is controlled by a device tree node which contains both
94 the GPIO definitions and pin control functions for each available
95 multiplex function.
96
Marek Vasuta59e6972017-10-08 20:57:37 +020097config PINCTRL_PFC_R8A77995
98 bool "Renesas RCar Gen3 R8A77995 pin control driver"
99 def_bool y if R8A77995
100 depends on PINCTRL_PFC
101 help
102 Support pin multiplexing control on Renesas RCar Gen3 R8A77995 SoCs.
103
104 The driver is controlled by a device tree node which contains both
105 the GPIO definitions and pin control functions for each available
106 multiplex function.
107
Marek Vasut910df4d2017-09-15 21:13:55 +0200108endif