blob: 3a7d40e5f091d4cbe15945d4995623fd26e48336 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: BSD-3-Clause */
Kever Yangbcc17262017-05-05 11:47:45 +08002/*
3 * This is from the ARM TF Project,
4 * Repository: https://github.com/ARM-software/arm-trusted-firmware.git
5 * File: include/common/bl_common.h
6 * Portions copyright (c) 2013-2016, ARM Limited and Contributors. All rights
7 * reserved.
8 * Copyright (C) 2016-2017 Rockchip Electronic Co.,Ltd
Kever Yangbcc17262017-05-05 11:47:45 +08009 */
10
11#ifndef __BL_COMMON_H__
12#define __BL_COMMON_H__
13
14#define ATF_PARAM_EP 0x01
15#define ATF_PARAM_IMAGE_BINARY 0x02
16#define ATF_PARAM_BL31 0x03
17
18#define ATF_VERSION_1 0x01
19
20#define ATF_EP_SECURE 0x0
21#define ATF_EP_NON_SECURE 0x1
22
23#define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \
24 (_p)->h.type = (uint8_t)(_type); \
25 (_p)->h.version = (uint8_t)(_ver); \
26 (_p)->h.size = (uint16_t)sizeof(*_p); \
27 (_p)->h.attr = (uint32_t)(_attr) ; \
28 } while (0)
29
30#define MODE_RW_SHIFT 0x4
31#define MODE_RW_MASK 0x1
32#define MODE_RW_64 0x0
33#define MODE_RW_32 0x1
34
35#define MODE_EL_SHIFT 0x2
36#define MODE_EL_MASK 0x3
37#define MODE_EL3 0x3
38#define MODE_EL2 0x2
39#define MODE_EL1 0x1
40#define MODE_EL0 0x0
41
42#define MODE_SP_SHIFT 0x0
43#define MODE_SP_MASK 0x1
44#define MODE_SP_EL0 0x0
45#define MODE_SP_ELX 0x1
46
47#define SPSR_DAIF_SHIFT 6
48#define SPSR_DAIF_MASK 0x0f
49
50#define SPSR_64(el, sp, daif) \
51 (MODE_RW_64 << MODE_RW_SHIFT | \
52 ((el) & MODE_EL_MASK) << MODE_EL_SHIFT | \
53 ((sp) & MODE_SP_MASK) << MODE_SP_SHIFT | \
54 ((daif) & SPSR_DAIF_MASK) << SPSR_DAIF_SHIFT)
55
56#define SPSR_FIQ (1 << 6)
57#define SPSR_IRQ (1 << 7)
58#define SPSR_SERROR (1 << 8)
59#define SPSR_DEBUG (1 << 9)
60#define SPSR_EXCEPTION_MASK (SPSR_FIQ | SPSR_IRQ | SPSR_SERROR | SPSR_DEBUG)
61
62#define DAIF_FIQ_BIT (1<<0)
63#define DAIF_IRQ_BIT (1<<1)
64#define DAIF_ABT_BIT (1<<2)
65#define DAIF_DBG_BIT (1<<3)
66#define DISABLE_ALL_EXECPTIONS \
67 (DAIF_FIQ_BIT | DAIF_IRQ_BIT | DAIF_ABT_BIT | DAIF_DBG_BIT)
68
69#ifndef __ASSEMBLY__
70
71/*******************************************************************************
72 * Structure used for telling the next BL how much of a particular type of
73 * memory is available for its use and how much is already used.
74 ******************************************************************************/
75struct aapcs64_params {
76 unsigned long arg0;
77 unsigned long arg1;
78 unsigned long arg2;
79 unsigned long arg3;
80 unsigned long arg4;
81 unsigned long arg5;
82 unsigned long arg6;
83 unsigned long arg7;
84};
85
86/***************************************************************************
87 * This structure provides version information and the size of the
88 * structure, attributes for the structure it represents
89 ***************************************************************************/
90struct param_header {
91 uint8_t type; /* type of the structure */
92 uint8_t version; /* version of this structure */
93 uint16_t size; /* size of this structure in bytes */
94 uint32_t attr; /* attributes: unused bits SBZ */
95};
96
97/*****************************************************************************
98 * This structure represents the superset of information needed while
99 * switching exception levels. The only two mechanisms to do so are
100 * ERET & SMC. Security state is indicated using bit zero of header
101 * attribute
102 * NOTE: BL1 expects entrypoint followed by spsr at an offset from the start
103 * of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while
104 * processing SMC to jump to BL31.
105 *****************************************************************************/
106struct entry_point_info {
107 struct param_header h;
108 uintptr_t pc;
109 uint32_t spsr;
110 struct aapcs64_params args;
111};
112
113/*****************************************************************************
114 * Image info binary provides information from the image loader that
115 * can be used by the firmware to manage available trusted RAM.
116 * More advanced firmware image formats can provide additional
117 * information that enables optimization or greater flexibility in the
118 * common firmware code
119 *****************************************************************************/
120struct atf_image_info {
121 struct param_header h;
122 uintptr_t image_base; /* physical address of base of image */
123 uint32_t image_size; /* bytes read from image file */
124};
125
126/*****************************************************************************
127 * The image descriptor struct definition.
128 *****************************************************************************/
129struct image_desc {
130 /* Contains unique image id for the image. */
131 unsigned int image_id;
132 /*
133 * This member contains Image state information.
134 * Refer IMAGE_STATE_XXX defined above.
135 */
136 unsigned int state;
137 uint32_t copied_size; /* image size copied in blocks */
138 struct atf_image_info atf_image_info;
139 struct entry_point_info ep_info;
140};
141
142/*******************************************************************************
143 * This structure represents the superset of information that can be passed to
144 * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be
145 * populated only if BL2 detects its presence. A pointer to a structure of this
146 * type should be passed in X0 to BL31's cold boot entrypoint.
147 *
148 * Use of this structure and the X0 parameter is not mandatory: the BL31
149 * platform code can use other mechanisms to provide the necessary information
150 * about BL32 and BL33 to the common and SPD code.
151 *
152 * BL31 image information is mandatory if this structure is used. If either of
153 * the optional BL32 and BL33 image information is not provided, this is
154 * indicated by the respective image_info pointers being zero.
155 ******************************************************************************/
156struct bl31_params {
157 struct param_header h;
158 struct atf_image_info *bl31_image_info;
159 struct entry_point_info *bl32_ep_info;
160 struct atf_image_info *bl32_image_info;
161 struct entry_point_info *bl33_ep_info;
162 struct atf_image_info *bl33_image_info;
163};
164
165/*******************************************************************************
166 * This structure represents the superset of information that is passed to
167 * BL31, e.g. while passing control to it from BL2, bl31_params
168 * and other platform specific params
169 ******************************************************************************/
170struct bl2_to_bl31_params_mem {
171 struct bl31_params bl31_params;
172 struct atf_image_info bl31_image_info;
173 struct atf_image_info bl32_image_info;
174 struct atf_image_info bl33_image_info;
175 struct entry_point_info bl33_ep_info;
176 struct entry_point_info bl32_ep_info;
177 struct entry_point_info bl31_ep_info;
178};
179
180#endif /*__ASSEMBLY__*/
181
182#endif /* __BL_COMMON_H__ */