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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schocher0f8bc282013-12-02 07:47:22 +01002/*
3 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
4 * (C) Copyright 2013 Siemens AG
5 *
6 * Based on:
7 * U-Boot file: include/configs/at91sam9260ek.h
8 *
9 * (C) Copyright 2007-2008
10 * Stelian Pop <stelian@popies.net>
11 * Lead Tech Design <www.leadtechdesign.com>
Heiko Schocher0f8bc282013-12-02 07:47:22 +010012 */
13
14#ifndef __CONFIG_H
15#define __CONFIG_H
16
17/*
18 * SoC must be defined first, before hardware.h is included.
19 * In this case SoC is defined in boards.cfg.
20 */
21#include <asm/hardware.h>
Heiko Schocher40540822015-08-21 18:53:46 +020022#include <linux/sizes.h>
Heiko Schocher0f8bc282013-12-02 07:47:22 +010023
Heiko Schocher0f8bc282013-12-02 07:47:22 +010024/*
25 * Warning: changing CONFIG_SYS_TEXT_BASE requires
26 * adapting the initial boot program.
27 * Since the linker has to swallow that define, we must use a pure
28 * hex number here!
29 */
30
Heiko Schocher0f8bc282013-12-02 07:47:22 +010031/* ARM asynchronous clock */
32#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
33#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
Heiko Schocher0f8bc282013-12-02 07:47:22 +010034
35/* Misc CPU related */
Heiko Schocher0f8bc282013-12-02 07:47:22 +010036#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
37#define CONFIG_SETUP_MEMORY_TAGS
38#define CONFIG_INITRD_TAG
Heiko Schocher0cac0fb2019-04-29 16:36:10 +020039
Heiko Schocher8e6e8222016-05-25 07:23:48 +020040#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
Heiko Schocher0f8bc282013-12-02 07:47:22 +010041
Heiko Schocher0f8bc282013-12-02 07:47:22 +010042/* general purpose I/O */
43#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
Heiko Schocher0f8bc282013-12-02 07:47:22 +010044#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
45
Heiko Schocher0f8bc282013-12-02 07:47:22 +010046#define CONFIG_USART_BASE ATMEL_BASE_DBGU
47#define CONFIG_USART_ID ATMEL_ID_SYS
Heiko Schocher0f8bc282013-12-02 07:47:22 +010048
Heiko Schocher0f8bc282013-12-02 07:47:22 +010049/*
Heiko Schocher0f8bc282013-12-02 07:47:22 +010050 * SDRAM: 1 bank, min 32, max 128 MB
51 * Initialized before u-boot gets started.
52 */
Heiko Schocher0f8bc282013-12-02 07:47:22 +010053#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
Heiko Schocher0ed366f2015-08-21 18:55:07 +020054#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
Heiko Schocher0f8bc282013-12-02 07:47:22 +010055
56/*
57 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
58 * leaving the correct space for initial global data structure above
59 * that address while providing maximum stack area below.
60 */
Heiko Schocher0ed366f2015-08-21 18:55:07 +020061#define CONFIG_SYS_INIT_SP_ADDR \
Heiko Schocher0f8bc282013-12-02 07:47:22 +010062 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
63
64/* NAND flash */
65#ifdef CONFIG_CMD_NAND
Heiko Schocher0f8bc282013-12-02 07:47:22 +010066#define CONFIG_SYS_MAX_NAND_DEVICE 1
67#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
68#define CONFIG_SYS_NAND_DBW_8
69#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
70#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
71#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
72#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
73#endif
74
Heiko Schocher0f8bc282013-12-02 07:47:22 +010075/* Ethernet */
76#define CONFIG_MACB
77#define CONFIG_RMII
78#define CONFIG_AT91_WANTS_COMMON_PHY
79
80/* USB */
81#if defined(CONFIG_BOARD_TAURUS)
82#define CONFIG_USB_ATMEL
Heiko Schochere8b81ee2015-09-08 11:52:52 +020083#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Heiko Schocher0f8bc282013-12-02 07:47:22 +010084#define CONFIG_USB_OHCI_NEW
85#define CONFIG_SYS_USB_OHCI_CPU_INIT
86#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
87#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
88#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Heiko Schochere8b81ee2015-09-08 11:52:52 +020089
90/* USB DFU support */
Heiko Schochere8b81ee2015-09-08 11:52:52 +020091
Heiko Schochere8b81ee2015-09-08 11:52:52 +020092#define CONFIG_USB_GADGET_AT91
93
94/* DFU class support */
Heiko Schochere8b81ee2015-09-08 11:52:52 +020095#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
96#define DFU_MANIFEST_POLL_TIMEOUT 25000
Heiko Schocher0f8bc282013-12-02 07:47:22 +010097#endif
98
Heiko Schocher50921cd2014-10-31 08:30:56 +010099/* SPI EEPROM */
Heiko Schocher50921cd2014-10-31 08:30:56 +0100100#define TAURUS_SPI_MASK (1 << 4)
Heiko Schocher50921cd2014-10-31 08:30:56 +0100101
Heiko Schochera1655bb2014-11-18 09:41:58 +0100102#if defined(CONFIG_SPL_BUILD)
103/* SPL related */
Heiko Schochera1655bb2014-11-18 09:41:58 +0100104#endif
105
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100106/* load address */
107#define CONFIG_SYS_LOAD_ADDR 0x22000000
108
109/* bootstrap in spi flash , u-boot + env + linux in nandflash */
Heiko Schocher40540822015-08-21 18:53:46 +0200110
Heiko Schocher0cac0fb2019-04-29 16:36:10 +0200111#ifndef CONFIG_SPL_BUILD
112#if defined(CONFIG_BOARD_AXM)
113#define CONFIG_EXTRA_ENV_SETTINGS \
114 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
115 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
116 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
117 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
118 "boot_retries=0\0" \
119 "ethact=macb0\0" \
120 "flash_nfs=run nand_kernel;run nfsargs;run addip;" \
121 "upgrade_available;bootm ${kernel_ram};reset\0" \
122 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
123 "bootm ${kernel_ram};reset\0" \
124 "flash_self_test=run nand_kernel;run setbootargs addtest;" \
125 "upgrade_available;bootm ${kernel_ram};reset\0" \
126 "hostname=systemone\0" \
127 "kernel_Off=0x00200000\0" \
128 "kernel_Off_fallback=0x03800000\0" \
129 "kernel_ram=0x21500000\0" \
130 "kernel_size=0x00400000\0" \
131 "kernel_size_fallback=0x00400000\0" \
132 "loads_echo=1\0" \
133 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
134 "${kernel_size}\0" \
135 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
136 "run nfsargs;run addip;upgrade_available;" \
137 "bootm ${kernel_ram};reset\0" \
138 "netdev=eth0\0" \
139 "nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
140 "rw nfsroot=${serverip}:${rootpath} " \
141 "at91sam9_wdt.wdt_timeout=16\0" \
142 "partitionset_active=A\0" \
143 "preboot=echo;echo Type 'run flash_self' to use kernel and root " \
144 "filesystem on memory;echo Type 'run flash_nfs' to use " \
145 "kernel from memory and root filesystem over NFS;echo Type " \
146 "'run net_nfs' to get Kernel over TFTP and mount root " \
147 "filesystem over NFS;echo\0" \
148 "project_dir=systemone\0" \
149 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
150 "rootfs=/dev/mtdblock5\0" \
151 "rootfs_fallback=/dev/mtdblock7\0" \
152 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
153 "root=${rootfs} rootfstype=jffs2 panic=7 " \
154 "at91sam9_wdt.wdt_timeout=16\0" \
155 "stderr=serial\0" \
156 "stdin=serial\0" \
157 "stdout=serial\0" \
158 "upgrade_available=0\0"
159#endif
160#endif /* #ifndef CONFIG_SPL_BUILD */
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100161/*
162 * Size of malloc() pool
163 */
164#define CONFIG_SYS_MALLOC_LEN \
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200165 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100166
Heiko Schocher237e3792014-10-31 08:31:05 +0100167/* Defines for SPL */
Heiko Schocher40540822015-08-21 18:53:46 +0200168#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
169#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
Heiko Schochera1655bb2014-11-18 09:41:58 +0100170#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
171 CONFIG_SYS_MALLOC_LEN)
172#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
Heiko Schocher237e3792014-10-31 08:31:05 +0100173
174#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
Heiko Schocher0ed366f2015-08-21 18:55:07 +0200175#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
Heiko Schocher237e3792014-10-31 08:31:05 +0100176
Heiko Schocher237e3792014-10-31 08:31:05 +0100177#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
Heiko Schocher237e3792014-10-31 08:31:05 +0100178#define CONFIG_SYS_USE_NANDFLASH 1
179#define CONFIG_SPL_NAND_DRIVERS
180#define CONFIG_SPL_NAND_BASE
181#define CONFIG_SPL_NAND_ECC
182#define CONFIG_SPL_NAND_RAW_ONLY
183#define CONFIG_SPL_NAND_SOFTECC
184#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200185#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
Heiko Schocher237e3792014-10-31 08:31:05 +0100186#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
187#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
188#define CONFIG_SYS_NAND_5_ADDR_CYCLE
189
Heiko Schocher0ed366f2015-08-21 18:55:07 +0200190#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
191#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
192#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
Heiko Schocher237e3792014-10-31 08:31:05 +0100193#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
194 CONFIG_SYS_NAND_PAGE_SIZE)
195#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
196#define CONFIG_SYS_NAND_ECCSIZE 256
197#define CONFIG_SYS_NAND_ECCBYTES 3
198#define CONFIG_SYS_NAND_OOBSIZE 64
199#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
200 48, 49, 50, 51, 52, 53, 54, 55, \
201 56, 57, 58, 59, 60, 61, 62, 63, }
202
Heiko Schocher237e3792014-10-31 08:31:05 +0100203#define CONFIG_SPL_ATMEL_SIZE
204#define CONFIG_SYS_MASTER_CLOCK 132096000
205#define AT91_PLL_LOCK_TIMEOUT 1000000
206#define CONFIG_SYS_AT91_PLLA 0x202A3F01
207#define CONFIG_SYS_MCKR 0x1300
208#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
209#define CONFIG_SYS_AT91_PLLB 0x10193F05
Heiko Schocher40540822015-08-21 18:53:46 +0200210
Stefan Roesefc89afb2019-04-02 10:57:25 +0200211#define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS
212#define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
213
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100214#endif