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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +01002/*
3 * Copyright (C) 2005-2006 Atmel Corporation
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +01004 */
Sven Schnelle72fa4672011-10-21 14:49:25 +02005#ifndef __ATMEL_MCI_H__
6#define __ATMEL_MCI_H__
7
8int atmel_mci_init(void *regs);
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +01009
Reinhard Meyer1592ef82010-08-13 10:31:06 +020010#ifndef __ASSEMBLY__
11
12/*
13 * Structure for struct SoC access.
14 * Names starting with '_' are fillers.
15 */
16typedef struct atmel_mci {
17 /* reg Offset */
18 u32 cr; /* 0x00 */
19 u32 mr; /* 0x04 */
20 u32 dtor; /* 0x08 */
21 u32 sdcr; /* 0x0c */
22 u32 argr; /* 0x10 */
23 u32 cmdr; /* 0x14 */
Wu, Josh1db73772012-09-13 22:22:04 +000024 u32 blkr; /* 0x18 */
Reinhard Meyer1592ef82010-08-13 10:31:06 +020025 u32 _1c; /* 0x1c */
26 u32 rspr; /* 0x20 */
27 u32 rspr1; /* 0x24 */
28 u32 rspr2; /* 0x28 */
29 u32 rspr3; /* 0x2c */
30 u32 rdr; /* 0x30 */
31 u32 tdr; /* 0x34 */
32 u32 _38; /* 0x38 */
33 u32 _3c; /* 0x3c */
34 u32 sr; /* 0x40 */
35 u32 ier; /* 0x44 */
36 u32 idr; /* 0x48 */
37 u32 imr; /* 0x4c */
Bo Shen70ec3282014-07-31 14:39:31 +080038 u32 dma; /* 0x50 */
39 u32 cfg; /* 0x54 */
40 u32 reserved[41];
Bo Shenaac4b692013-04-26 00:27:06 +000041 u32 version;
Reinhard Meyer1592ef82010-08-13 10:31:06 +020042} atmel_mci_t;
43
44#endif /* __ASSEMBLY__ */
45
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +010046/* Bitfields in CR */
47#define MMCI_MCIEN_OFFSET 0
48#define MMCI_MCIEN_SIZE 1
49#define MMCI_MCIDIS_OFFSET 1
50#define MMCI_MCIDIS_SIZE 1
51#define MMCI_PWSEN_OFFSET 2
52#define MMCI_PWSEN_SIZE 1
53#define MMCI_PWSDIS_OFFSET 3
54#define MMCI_PWSDIS_SIZE 1
55#define MMCI_SWRST_OFFSET 7
56#define MMCI_SWRST_SIZE 1
57
58/* Bitfields in MR */
59#define MMCI_CLKDIV_OFFSET 0
60#define MMCI_CLKDIV_SIZE 8
61#define MMCI_PWSDIV_OFFSET 8
62#define MMCI_PWSDIV_SIZE 3
Haavard Skinnemoenf0d12462007-06-27 13:34:26 +020063#define MMCI_RDPROOF_OFFSET 11
64#define MMCI_RDPROOF_SIZE 1
65#define MMCI_WRPROOF_OFFSET 12
66#define MMCI_WRPROOF_SIZE 1
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +010067#define MMCI_PDCPADV_OFFSET 14
68#define MMCI_PDCPADV_SIZE 1
69#define MMCI_PDCMODE_OFFSET 15
70#define MMCI_PDCMODE_SIZE 1
Bo Shencd60ebd42014-07-31 14:39:30 +080071/* MCI IP version >= 0x500, MR bit 16 used for CLKODD */
72#define MMCI_CLKODD_OFFSET 16
73#define MMCI_CLKODD_SIZE 1
74/* MCI IP version < 0x200, MR higher 16bits for BLKLEN */
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +010075#define MMCI_BLKLEN_OFFSET 16
76#define MMCI_BLKLEN_SIZE 16
77
78/* Bitfields in DTOR */
79#define MMCI_DTOCYC_OFFSET 0
80#define MMCI_DTOCYC_SIZE 4
81#define MMCI_DTOMUL_OFFSET 4
82#define MMCI_DTOMUL_SIZE 3
83
84/* Bitfields in SDCR */
85#define MMCI_SCDSEL_OFFSET 0
86#define MMCI_SCDSEL_SIZE 4
87#define MMCI_SCDBUS_OFFSET 7
88#define MMCI_SCDBUS_SIZE 1
89
90/* Bitfields in ARGR */
91#define MMCI_ARG_OFFSET 0
92#define MMCI_ARG_SIZE 32
93
94/* Bitfields in CMDR */
95#define MMCI_CMDNB_OFFSET 0
96#define MMCI_CMDNB_SIZE 6
97#define MMCI_RSPTYP_OFFSET 6
98#define MMCI_RSPTYP_SIZE 2
99#define MMCI_SPCMD_OFFSET 8
100#define MMCI_SPCMD_SIZE 3
101#define MMCI_OPDCMD_OFFSET 11
102#define MMCI_OPDCMD_SIZE 1
103#define MMCI_MAXLAT_OFFSET 12
104#define MMCI_MAXLAT_SIZE 1
105#define MMCI_TRCMD_OFFSET 16
106#define MMCI_TRCMD_SIZE 2
107#define MMCI_TRDIR_OFFSET 18
108#define MMCI_TRDIR_SIZE 1
109#define MMCI_TRTYP_OFFSET 19
110#define MMCI_TRTYP_SIZE 2
111
Wu, Josh1db73772012-09-13 22:22:04 +0000112/* Bitfields in BLKR */
113/* MMCI_BLKLEN_OFFSET/SIZE already defined in MR */
114#define MMCI_BCNT_OFFSET 0
115#define MMCI_BCNT_SIZE 16
116
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +0100117/* Bitfields in RSPRx */
118#define MMCI_RSP_OFFSET 0
119#define MMCI_RSP_SIZE 32
120
121/* Bitfields in SR/IER/IDR/IMR */
122#define MMCI_CMDRDY_OFFSET 0
123#define MMCI_CMDRDY_SIZE 1
124#define MMCI_RXRDY_OFFSET 1
125#define MMCI_RXRDY_SIZE 1
126#define MMCI_TXRDY_OFFSET 2
127#define MMCI_TXRDY_SIZE 1
128#define MMCI_BLKE_OFFSET 3
129#define MMCI_BLKE_SIZE 1
130#define MMCI_DTIP_OFFSET 4
131#define MMCI_DTIP_SIZE 1
132#define MMCI_NOTBUSY_OFFSET 5
133#define MMCI_NOTBUSY_SIZE 1
134#define MMCI_ENDRX_OFFSET 6
135#define MMCI_ENDRX_SIZE 1
136#define MMCI_ENDTX_OFFSET 7
137#define MMCI_ENDTX_SIZE 1
138#define MMCI_RXBUFF_OFFSET 14
139#define MMCI_RXBUFF_SIZE 1
140#define MMCI_TXBUFE_OFFSET 15
141#define MMCI_TXBUFE_SIZE 1
142#define MMCI_RINDE_OFFSET 16
143#define MMCI_RINDE_SIZE 1
144#define MMCI_RDIRE_OFFSET 17
145#define MMCI_RDIRE_SIZE 1
146#define MMCI_RCRCE_OFFSET 18
147#define MMCI_RCRCE_SIZE 1
148#define MMCI_RENDE_OFFSET 19
149#define MMCI_RENDE_SIZE 1
150#define MMCI_RTOE_OFFSET 20
151#define MMCI_RTOE_SIZE 1
152#define MMCI_DCRCE_OFFSET 21
153#define MMCI_DCRCE_SIZE 1
154#define MMCI_DTOE_OFFSET 22
155#define MMCI_DTOE_SIZE 1
156#define MMCI_OVRE_OFFSET 30
157#define MMCI_OVRE_SIZE 1
158#define MMCI_UNRE_OFFSET 31
159#define MMCI_UNRE_SIZE 1
160
161/* Constants for DTOMUL */
162#define MMCI_DTOMUL_1_CYCLE 0
163#define MMCI_DTOMUL_16_CYCLES 1
164#define MMCI_DTOMUL_128_CYCLES 2
165#define MMCI_DTOMUL_256_CYCLES 3
166#define MMCI_DTOMUL_1024_CYCLES 4
167#define MMCI_DTOMUL_4096_CYCLES 5
168#define MMCI_DTOMUL_65536_CYCLES 6
169#define MMCI_DTOMUL_1048576_CYCLES 7
170
171/* Constants for RSPTYP */
172#define MMCI_RSPTYP_NO_RESP 0
173#define MMCI_RSPTYP_48_BIT_RESP 1
174#define MMCI_RSPTYP_136_BIT_RESP 2
175
176/* Constants for SPCMD */
177#define MMCI_SPCMD_NO_SPEC_CMD 0
178#define MMCI_SPCMD_INIT_CMD 1
179#define MMCI_SPCMD_SYNC_CMD 2
180#define MMCI_SPCMD_INT_CMD 4
181#define MMCI_SPCMD_INT_RESP 5
182
183/* Constants for TRCMD */
184#define MMCI_TRCMD_NO_TRANS 0
185#define MMCI_TRCMD_START_TRANS 1
186#define MMCI_TRCMD_STOP_TRANS 2
187
188/* Constants for TRTYP */
189#define MMCI_TRTYP_BLOCK 0
190#define MMCI_TRTYP_MULTI_BLOCK 1
191#define MMCI_TRTYP_STREAM 2
192
Bo Shen70ec3282014-07-31 14:39:31 +0800193/* Bitfields in CFG */
194#define MMCI_FIFOMODE_OFFSET 0
195#define MMCI_FIFOMODE_SIZE 1
196#define MMCI_FERRCTRL_OFFSET 4
197#define MMCI_FERRCTRL_SIZE 1
198#define MMCI_HSMODE_OFFSET 8
199#define MMCI_HSMODE_SIZE 1
200#define MMCI_LSYNC_OFFSET 12
201#define MMCI_LSYNC_SIZE 1
202
Haavard Skinnemoenfc26c972006-01-20 10:03:53 +0100203/* Bit manipulation macros */
204#define MMCI_BIT(name) \
205 (1 << MMCI_##name##_OFFSET)
206#define MMCI_BF(name,value) \
207 (((value) & ((1 << MMCI_##name##_SIZE) - 1)) \
208 << MMCI_##name##_OFFSET)
209#define MMCI_BFEXT(name,value) \
210 (((value) >> MMCI_##name##_OFFSET)\
211 & ((1 << MMCI_##name##_SIZE) - 1))
212#define MMCI_BFINS(name,value,old) \
213 (((old) & ~(((1 << MMCI_##name##_SIZE) - 1) \
214 << MMCI_##name##_OFFSET)) \
215 | MMCI_BF(name,value))
216
Sven Schnelle72fa4672011-10-21 14:49:25 +0200217#endif /* __ATMEL_MCI_H__ */