Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2012 SAMSUNG Electronics |
| 3 | * Jaehoon Chung <jh80.chung@samsung.com> |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 9 | #include <dwmmc.h> |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 10 | #include <fdtdec.h> |
| 11 | #include <libfdt.h> |
| 12 | #include <malloc.h> |
Jaehoon Chung | ccd60a8 | 2016-07-19 16:33:34 +0900 | [diff] [blame] | 13 | #include <errno.h> |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 14 | #include <asm/arch/dwmmc.h> |
| 15 | #include <asm/arch/clk.h> |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 16 | #include <asm/arch/pinmux.h> |
Przemyslaw Marczak | 64029f7 | 2015-02-20 12:29:26 +0100 | [diff] [blame] | 17 | #include <asm/arch/power.h> |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 18 | #include <asm/gpio.h> |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 19 | |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 20 | #define DWMMC_MAX_CH_NUM 4 |
| 21 | #define DWMMC_MAX_FREQ 52000000 |
| 22 | #define DWMMC_MIN_FREQ 400000 |
Jaehoon Chung | 5dab81c | 2015-02-04 15:48:40 +0900 | [diff] [blame] | 23 | #define DWMMC_MMC0_SDR_TIMING_VAL 0x03030001 |
| 24 | #define DWMMC_MMC2_SDR_TIMING_VAL 0x03020001 |
| 25 | |
Jaehoon Chung | 3537ee8 | 2016-06-30 20:57:37 +0900 | [diff] [blame] | 26 | #ifdef CONFIG_DM_MMC |
| 27 | #include <dm.h> |
| 28 | DECLARE_GLOBAL_DATA_PTR; |
| 29 | |
| 30 | struct exynos_mmc_plat { |
| 31 | struct mmc_config cfg; |
| 32 | struct mmc mmc; |
| 33 | }; |
| 34 | #endif |
| 35 | |
Jaehoon Chung | 5dab81c | 2015-02-04 15:48:40 +0900 | [diff] [blame] | 36 | /* Exynos implmentation specific drver private data */ |
| 37 | struct dwmci_exynos_priv_data { |
Jaehoon Chung | 3537ee8 | 2016-06-30 20:57:37 +0900 | [diff] [blame] | 38 | #ifdef CONFIG_DM_MMC |
| 39 | struct dwmci_host host; |
| 40 | #endif |
Jaehoon Chung | 5dab81c | 2015-02-04 15:48:40 +0900 | [diff] [blame] | 41 | u32 sdr_timing; |
| 42 | }; |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 43 | |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 44 | /* |
| 45 | * Function used as callback function to initialise the |
| 46 | * CLKSEL register for every mmc channel. |
| 47 | */ |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 48 | static void exynos_dwmci_clksel(struct dwmci_host *host) |
| 49 | { |
Jaehoon Chung | 5dab81c | 2015-02-04 15:48:40 +0900 | [diff] [blame] | 50 | struct dwmci_exynos_priv_data *priv = host->priv; |
| 51 | |
| 52 | dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 53 | } |
| 54 | |
Simon Glass | e3563f2 | 2015-08-30 16:55:15 -0600 | [diff] [blame] | 55 | unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 56 | { |
Rajeshwari S Shinde | d3e016c | 2014-02-05 10:48:15 +0530 | [diff] [blame] | 57 | unsigned long sclk; |
| 58 | int8_t clk_div; |
| 59 | |
| 60 | /* |
| 61 | * Since SDCLKIN is divided inside controller by the DIVRATIO |
| 62 | * value set in the CLKSEL register, we need to use the same output |
| 63 | * clock value to calculate the CLKDIV value. |
| 64 | * as per user manual:cclk_in = SDCLKIN / (DIVRATIO + 1) |
| 65 | */ |
| 66 | clk_div = ((dwmci_readl(host, DWMCI_CLKSEL) >> DWMCI_DIVRATIO_BIT) |
| 67 | & DWMCI_DIVRATIO_MASK) + 1; |
| 68 | sclk = get_mmc_clk(host->dev_index); |
| 69 | |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 70 | /* |
| 71 | * Assume to know divider value. |
| 72 | * When clock unit is broken, need to set "host->div" |
| 73 | */ |
| 74 | return sclk / clk_div / (host->div + 1); |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 75 | } |
| 76 | |
Jaehoon Chung | 18ab675 | 2013-11-29 20:08:57 +0900 | [diff] [blame] | 77 | static void exynos_dwmci_board_init(struct dwmci_host *host) |
| 78 | { |
Jaehoon Chung | 5dab81c | 2015-02-04 15:48:40 +0900 | [diff] [blame] | 79 | struct dwmci_exynos_priv_data *priv = host->priv; |
| 80 | |
Jaehoon Chung | 18ab675 | 2013-11-29 20:08:57 +0900 | [diff] [blame] | 81 | if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) { |
| 82 | dwmci_writel(host, EMMCP_MPSBEGIN0, 0); |
| 83 | dwmci_writel(host, EMMCP_SEND0, 0); |
| 84 | dwmci_writel(host, EMMCP_CTRL0, |
| 85 | MPSCTRL_SECURE_READ_BIT | |
| 86 | MPSCTRL_SECURE_WRITE_BIT | |
| 87 | MPSCTRL_NON_SECURE_READ_BIT | |
| 88 | MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID); |
| 89 | } |
Jaehoon Chung | 3a33bb1 | 2015-02-04 15:48:39 +0900 | [diff] [blame] | 90 | |
Jaehoon Chung | 5dab81c | 2015-02-04 15:48:40 +0900 | [diff] [blame] | 91 | /* Set to timing value at initial time */ |
| 92 | if (priv->sdr_timing) |
Jaehoon Chung | 3a33bb1 | 2015-02-04 15:48:39 +0900 | [diff] [blame] | 93 | exynos_dwmci_clksel(host); |
Jaehoon Chung | 18ab675 | 2013-11-29 20:08:57 +0900 | [diff] [blame] | 94 | } |
| 95 | |
Jaehoon Chung | d956a67 | 2016-06-29 19:46:17 +0900 | [diff] [blame] | 96 | static int exynos_dwmci_core_init(struct dwmci_host *host) |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 97 | { |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 98 | unsigned int div; |
| 99 | unsigned long freq, sclk; |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 100 | |
| 101 | if (host->bus_hz) |
| 102 | freq = host->bus_hz; |
| 103 | else |
| 104 | freq = DWMMC_MAX_FREQ; |
| 105 | |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 106 | /* request mmc clock vlaue of 52MHz. */ |
Jaehoon Chung | d956a67 | 2016-06-29 19:46:17 +0900 | [diff] [blame] | 107 | sclk = get_mmc_clk(host->dev_index); |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 108 | div = DIV_ROUND_UP(sclk, freq); |
| 109 | /* set the clock divisor for mmc */ |
Jaehoon Chung | d956a67 | 2016-06-29 19:46:17 +0900 | [diff] [blame] | 110 | set_mmc_clk(host->dev_index, div); |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 111 | |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 112 | host->name = "EXYNOS DWMMC"; |
Rajeshwari Shinde | 6f0b7ca | 2013-10-29 12:53:13 +0530 | [diff] [blame] | 113 | #ifdef CONFIG_EXYNOS5420 |
| 114 | host->quirks = DWMCI_QUIRK_DISABLE_SMU; |
| 115 | #endif |
Jaehoon Chung | 18ab675 | 2013-11-29 20:08:57 +0900 | [diff] [blame] | 116 | host->board_init = exynos_dwmci_board_init; |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 117 | |
Jaehoon Chung | e09bd85 | 2014-05-16 13:59:57 +0900 | [diff] [blame] | 118 | host->caps = MMC_MODE_DDR_52MHz; |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 119 | host->clksel = exynos_dwmci_clksel; |
Jaehoon Chung | b44fe83 | 2013-10-06 18:59:31 +0900 | [diff] [blame] | 120 | host->get_mmc_clk = exynos_dwmci_get_clk; |
Jaehoon Chung | 3537ee8 | 2016-06-30 20:57:37 +0900 | [diff] [blame] | 121 | |
| 122 | #ifndef CONFIG_DM_MMC |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 123 | /* Add the mmc channel to be registered with mmc core */ |
| 124 | if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { |
Jaehoon Chung | d956a67 | 2016-06-29 19:46:17 +0900 | [diff] [blame] | 125 | printf("DWMMC%d registration failed\n", host->dev_index); |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 126 | return -1; |
| 127 | } |
Jaehoon Chung | 3537ee8 | 2016-06-30 20:57:37 +0900 | [diff] [blame] | 128 | #endif |
| 129 | |
Jaehoon Chung | d0ebbb8 | 2012-10-15 19:10:31 +0000 | [diff] [blame] | 130 | return 0; |
| 131 | } |
| 132 | |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 133 | static struct dwmci_host dwmci_host[DWMMC_MAX_CH_NUM]; |
| 134 | |
| 135 | static int do_dwmci_init(struct dwmci_host *host) |
| 136 | { |
Jaehoon Chung | d956a67 | 2016-06-29 19:46:17 +0900 | [diff] [blame] | 137 | int flag, err; |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 138 | |
| 139 | flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; |
| 140 | err = exynos_pinmux_config(host->dev_id, flag); |
| 141 | if (err) { |
Jaehoon Chung | d956a67 | 2016-06-29 19:46:17 +0900 | [diff] [blame] | 142 | printf("DWMMC%d not configure\n", host->dev_index); |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 143 | return err; |
| 144 | } |
| 145 | |
Jaehoon Chung | d956a67 | 2016-06-29 19:46:17 +0900 | [diff] [blame] | 146 | return exynos_dwmci_core_init(host); |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 147 | } |
| 148 | |
| 149 | static int exynos_dwmci_get_config(const void *blob, int node, |
| 150 | struct dwmci_host *host) |
| 151 | { |
| 152 | int err = 0; |
Jaehoon Chung | 5dab81c | 2015-02-04 15:48:40 +0900 | [diff] [blame] | 153 | u32 base, timing[3]; |
| 154 | struct dwmci_exynos_priv_data *priv; |
| 155 | |
| 156 | priv = malloc(sizeof(struct dwmci_exynos_priv_data)); |
| 157 | if (!priv) { |
| 158 | error("dwmci_exynos_priv_data malloc fail!\n"); |
| 159 | return -ENOMEM; |
| 160 | } |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 161 | |
| 162 | /* Extract device id for each mmc channel */ |
| 163 | host->dev_id = pinmux_decode_periph_id(blob, node); |
| 164 | |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 165 | host->dev_index = fdtdec_get_int(blob, node, "index", host->dev_id); |
| 166 | if (host->dev_index == host->dev_id) |
| 167 | host->dev_index = host->dev_id - PERIPH_ID_SDMMC0; |
| 168 | |
Jaehoon Chung | ce757b1 | 2016-06-29 19:46:16 +0900 | [diff] [blame] | 169 | if (host->dev_index > 4) { |
| 170 | printf("DWMMC%d: Can't get the dev index\n", host->dev_index); |
| 171 | return -EINVAL; |
| 172 | } |
| 173 | |
Jaehoon Chung | 70f6d39 | 2016-06-29 19:46:18 +0900 | [diff] [blame] | 174 | /* Get the bus width from the device node (Default is 4bit buswidth) */ |
| 175 | host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 4); |
Jaehoon Chung | dfcb683 | 2014-11-28 20:42:33 +0900 | [diff] [blame] | 176 | |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 177 | /* Set the base address from the device node */ |
| 178 | base = fdtdec_get_addr(blob, node, "reg"); |
| 179 | if (!base) { |
Jaehoon Chung | dfcb683 | 2014-11-28 20:42:33 +0900 | [diff] [blame] | 180 | printf("DWMMC%d: Can't get base address\n", host->dev_index); |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 181 | return -EINVAL; |
| 182 | } |
| 183 | host->ioaddr = (void *)base; |
| 184 | |
| 185 | /* Extract the timing info from the node */ |
| 186 | err = fdtdec_get_int_array(blob, node, "samsung,timing", timing, 3); |
| 187 | if (err) { |
Jaehoon Chung | dfcb683 | 2014-11-28 20:42:33 +0900 | [diff] [blame] | 188 | printf("DWMMC%d: Can't get sdr-timings for devider\n", |
| 189 | host->dev_index); |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 190 | return -EINVAL; |
| 191 | } |
| 192 | |
Jaehoon Chung | 5dab81c | 2015-02-04 15:48:40 +0900 | [diff] [blame] | 193 | priv->sdr_timing = (DWMCI_SET_SAMPLE_CLK(timing[0]) | |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 194 | DWMCI_SET_DRV_CLK(timing[1]) | |
| 195 | DWMCI_SET_DIV_RATIO(timing[2])); |
Jaehoon Chung | 5dab81c | 2015-02-04 15:48:40 +0900 | [diff] [blame] | 196 | |
| 197 | /* sdr_timing didn't assigned anything, use the default value */ |
| 198 | if (!priv->sdr_timing) { |
| 199 | if (host->dev_index == 0) |
| 200 | priv->sdr_timing = DWMMC_MMC0_SDR_TIMING_VAL; |
| 201 | else if (host->dev_index == 2) |
| 202 | priv->sdr_timing = DWMMC_MMC2_SDR_TIMING_VAL; |
| 203 | } |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 204 | |
| 205 | host->fifoth_val = fdtdec_get_int(blob, node, "fifoth_val", 0); |
| 206 | host->bus_hz = fdtdec_get_int(blob, node, "bus_hz", 0); |
| 207 | host->div = fdtdec_get_int(blob, node, "div", 0); |
| 208 | |
Jaehoon Chung | 5dab81c | 2015-02-04 15:48:40 +0900 | [diff] [blame] | 209 | host->priv = priv; |
| 210 | |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 211 | return 0; |
| 212 | } |
| 213 | |
| 214 | static int exynos_dwmci_process_node(const void *blob, |
| 215 | int node_list[], int count) |
| 216 | { |
| 217 | struct dwmci_host *host; |
| 218 | int i, node, err; |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 219 | |
| 220 | for (i = 0; i < count; i++) { |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 221 | node = node_list[i]; |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 222 | if (node <= 0) |
| 223 | continue; |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 224 | host = &dwmci_host[i]; |
| 225 | err = exynos_dwmci_get_config(blob, node, host); |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 226 | if (err) { |
Jaehoon Chung | dfcb683 | 2014-11-28 20:42:33 +0900 | [diff] [blame] | 227 | printf("%s: failed to decode dev %d\n", __func__, i); |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 228 | return err; |
| 229 | } |
| 230 | |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 231 | do_dwmci_init(host); |
Amar | a082a2d | 2013-04-27 11:42:55 +0530 | [diff] [blame] | 232 | } |
| 233 | return 0; |
| 234 | } |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 235 | |
| 236 | int exynos_dwmmc_init(const void *blob) |
| 237 | { |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 238 | int node_list[DWMMC_MAX_CH_NUM]; |
Przemyslaw Marczak | 64029f7 | 2015-02-20 12:29:26 +0100 | [diff] [blame] | 239 | int boot_dev_node; |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 240 | int err = 0, count; |
| 241 | |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 242 | count = fdtdec_find_aliases_for_id(blob, "mmc", |
Jaehoon Chung | d956a67 | 2016-06-29 19:46:17 +0900 | [diff] [blame] | 243 | COMPAT_SAMSUNG_EXYNOS_DWMMC, node_list, |
| 244 | DWMMC_MAX_CH_NUM); |
Przemyslaw Marczak | 64029f7 | 2015-02-20 12:29:26 +0100 | [diff] [blame] | 245 | |
| 246 | /* For DWMMC always set boot device as mmc 0 */ |
| 247 | if (count >= 3 && get_boot_mode() == BOOT_MODE_SD) { |
| 248 | boot_dev_node = node_list[2]; |
| 249 | node_list[2] = node_list[0]; |
| 250 | node_list[0] = boot_dev_node; |
| 251 | } |
| 252 | |
Jaehoon Chung | 959198f | 2014-05-16 13:59:52 +0900 | [diff] [blame] | 253 | err = exynos_dwmci_process_node(blob, node_list, count); |
| 254 | |
| 255 | return err; |
| 256 | } |
Jaehoon Chung | 3537ee8 | 2016-06-30 20:57:37 +0900 | [diff] [blame] | 257 | |
| 258 | #ifdef CONFIG_DM_MMC |
| 259 | static int exynos_dwmmc_probe(struct udevice *dev) |
| 260 | { |
| 261 | struct exynos_mmc_plat *plat = dev_get_platdata(dev); |
| 262 | struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); |
| 263 | struct dwmci_exynos_priv_data *priv = dev_get_priv(dev); |
| 264 | struct dwmci_host *host = &priv->host; |
| 265 | int err; |
| 266 | |
Simon Glass | e160f7d | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 267 | err = exynos_dwmci_get_config(gd->fdt_blob, dev_of_offset(dev), host); |
Jaehoon Chung | 3537ee8 | 2016-06-30 20:57:37 +0900 | [diff] [blame] | 268 | if (err) |
| 269 | return err; |
| 270 | err = do_dwmci_init(host); |
| 271 | if (err) |
| 272 | return err; |
| 273 | |
Jaehoon Chung | e5113c3 | 2016-09-23 19:13:16 +0900 | [diff] [blame] | 274 | dwmci_setup_cfg(&plat->cfg, host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ); |
Jaehoon Chung | 3537ee8 | 2016-06-30 20:57:37 +0900 | [diff] [blame] | 275 | host->mmc = &plat->mmc; |
| 276 | host->mmc->priv = &priv->host; |
| 277 | host->priv = dev; |
| 278 | upriv->mmc = host->mmc; |
| 279 | |
| 280 | return dwmci_probe(dev); |
| 281 | } |
| 282 | |
| 283 | static int exynos_dwmmc_bind(struct udevice *dev) |
| 284 | { |
| 285 | struct exynos_mmc_plat *plat = dev_get_platdata(dev); |
Jaehoon Chung | 3537ee8 | 2016-06-30 20:57:37 +0900 | [diff] [blame] | 286 | |
Masahiro Yamada | 24f5aec | 2016-09-06 22:17:32 +0900 | [diff] [blame] | 287 | return dwmci_bind(dev, &plat->mmc, &plat->cfg); |
Jaehoon Chung | 3537ee8 | 2016-06-30 20:57:37 +0900 | [diff] [blame] | 288 | } |
| 289 | |
| 290 | static const struct udevice_id exynos_dwmmc_ids[] = { |
| 291 | { .compatible = "samsung,exynos4412-dw-mshc" }, |
| 292 | { } |
| 293 | }; |
| 294 | |
| 295 | U_BOOT_DRIVER(exynos_dwmmc_drv) = { |
| 296 | .name = "exynos_dwmmc", |
| 297 | .id = UCLASS_MMC, |
| 298 | .of_match = exynos_dwmmc_ids, |
| 299 | .bind = exynos_dwmmc_bind, |
| 300 | .ops = &dm_dwmci_ops, |
| 301 | .probe = exynos_dwmmc_probe, |
| 302 | .priv_auto_alloc_size = sizeof(struct dwmci_exynos_priv_data), |
| 303 | .platdata_auto_alloc_size = sizeof(struct exynos_mmc_plat), |
| 304 | }; |
| 305 | #endif |