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Wolfgang Denk6cb142f2006-03-12 02:12:27 +01001/*
2 * U-boot - stamp.h Configuration file for STAMP board
3 * having BF533 processor
4 *
5 * Copyright (c) 2005 blackfin.uclinux.org
6 *
7 * (C) Copyright 2000-2004
8 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010020 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010021 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#ifndef __CONFIG_STAMP_H__
30#define __CONFIG_STAMP_H__
31
32/*
33 * Board settings
34 *
35 */
36
37#define __ADSPLPBLACKFIN__ 1
38#define __ADSPBF533__ 1
39#define CONFIG_STAMP 1
40#define CONFIG_RTC_BF533 1
41
42/* FLASH/ETHERNET uses the same address range */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010043#define SHARED_RESOURCES 1
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010044
45#define CONFIG_VDSP 1
46
47/*
48 * Clock settings
49 *
50 */
51
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010052/* CONFIG_CLKIN_HZ is any value in Hz */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010053#define CONFIG_CLKIN_HZ 11059200
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010054/* CONFIG_CLKIN_HALF controls what is passed to PLL 0=CLKIN */
55/* 1=CLKIN/2 */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010056#define CONFIG_CLKIN_HALF 0
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010057/* CONFIG_PLL_BYPASS controls if the PLL is used 0=don't bypass */
58/* 1=bypass PLL */
59#define CONFIG_PLL_BYPASS 0
60/* CONFIG_VCO_MULT controls what the multiplier of the PLL is. */
61/* Values can range from 1-64 */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010062#define CONFIG_VCO_MULT 45
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010063/* CONFIG_CCLK_DIV controls what the core clock divider is */
64/* Values can be 1, 2, 4, or 8 ONLY */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010065#define CONFIG_CCLK_DIV 1
66/* CONFIG_SCLK_DIV controls what the peripheral clock divider is */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010067/* Values can range from 1-15 */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010068#define CONFIG_SCLK_DIV 6
69
70/*
71 * Network Settings
72 */
73/* network support */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010074#define CONFIG_IPADDR 192.168.0.15
75#define CONFIG_NETMASK 255.255.255.0
76#define CONFIG_GATEWAYIP 192.168.0.1
77#define CONFIG_SERVERIP 192.168.0.2
78#define CONFIG_HOSTNAME STAMP
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010079#define CONFIG_ROOTPATH /checkout/uClinux-dist/romfs
80
81/* To remove hardcoding and enable MAC storage in EEPROM */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010082/* #define CONFIG_ETHADDR 02:80:ad:20:31:b8 */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010083
84/*
85 * Command settings
86 *
87 */
88
89#define CFG_LONGHELP 1
90
91#define CONFIG_BOOTDELAY 5
92#define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, currently its disabled */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010093#define CONFIG_BOOTCOMMAND "run ramboot"
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010094#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n"
95
Wolfgang Denk8e7b7032006-03-12 02:55:22 +010096#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
Wolfgang Denk6cb142f2006-03-12 02:12:27 +010097 CFG_CMD_PING | \
98 CFG_CMD_ELF | \
99 CFG_CMD_I2C | \
100 CFG_CMD_CACHE | \
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100101 CFG_CMD_JFFS2 | \
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100102 CFG_CMD_DATE)
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100103#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw"
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100104
105#define CONFIG_EXTRA_ENV_SETTINGS \
106 "ramargs=setenv bootargs root=/dev/mtdblock0 rw\0" \
107 "nfsargs=setenv bootargs root=/dev/nfs rw " \
108 "nfsroot=$(serverip):$(rootpath)\0" \
109 "addip=setenv bootargs $(bootargs) " \
110 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
111 ":$(hostname):eth0:off\0" \
112 "ramboot=tftpboot 0x1000000 linux;" \
113 "run ramargs;run addip;bootelf\0" \
114 "nfsboot=tftpboot 0x1000000 linux;" \
115 "run nfsargs;run addip;bootelf\0" \
116 "flashboot=bootm 0x20100000\0" \
117 ""
118
119/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
120#include <cmd_confdefs.h>
121
122/*
123 * Console settings
124 *
125 */
126
127#define CONFIG_BAUDRATE 57600
128#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
129
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100130#define CFG_PROMPT "stamp>" /* Monitor Command Prompt */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100131#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100132#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100133#else
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100134#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100135#endif
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100136#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
137#define CFG_MAXARGS 16 /* max number of command args */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100138#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
139
140#define CONFIG_LOADS_ECHO 1
141
142/*
143 * Network settings
144 *
145 */
146
147#define CONFIG_DRIVER_SMC91111 1
148#define CONFIG_SMC91111_BASE 0x20300300
149/* To remove hardcoding and enable MAC storage in EEPROM */
150/* #define HARDCODE_MAC 1 */
151
152/*
153 * Flash settings
154 *
155 */
156
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100157#define CFG_FLASH_CFI /* The flash is CFI compatible */
158#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
159#define CFG_FLASH_CFI_AMD_RESET
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100160
161#define CFG_ENV_IS_IN_FLASH 1
162
163#define CFG_FLASH_BASE 0x20000000
164#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
165#define CFG_MAX_FLASH_SECT 67 /* max number of sectors on one chip */
166
167#define CFG_ENV_ADDR 0x20020000
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100168#define CFG_ENV_SIZE 0x10000
169#define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100170
171#define CFG_FLASH_ERASE_TOUT 30000 /* Timeout for Chip Erase (in ms) */
172#define CFG_FLASH_ERASEBLOCK_TOUT 5000 /* Timeout for Block Erase (in ms) */
173#define CFG_FLASH_WRITE_TOUT 1 /* Timeout for Flash Write (in ms) */
174
175/* JFFS Partition offset set */
176#define CFG_JFFS2_FIRST_BANK 0
177#define CFG_JFFS2_NUM_BANKS 1
178/* 512k reserved for u-boot */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100179#define CFG_JFFS2_FIRST_SECTOR 11
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100180
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100181/*
182 * following timeouts shall be used once the
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100183 * Flash real protection is enabled
184 */
185#define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
186#define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
187
188/*
189 * I2C settings
190 * By default PF2 is used as SDA and PF3 as SCL on the Stamp board
191 */
192#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
193/*
194 * Software (bit-bang) I2C driver configuration
195 */
196#define PF_SCL PF3
197#define PF_SDA PF2
198
199#define I2C_INIT (*pFIO_DIR |= PF_SCL); asm("ssync;")
200#define I2C_ACTIVE (*pFIO_DIR |= PF_SDA); *pFIO_INEN &= ~PF_SDA; asm("ssync;")
201#define I2C_TRISTATE (*pFIO_DIR &= ~PF_SDA); *pFIO_INEN |= PF_SDA; asm("ssync;")
202#define I2C_READ ((volatile)(*pFIO_FLAG_D & PF_SDA) != 0); asm("ssync;")
203#define I2C_SDA(bit) if(bit) { \
204 *pFIO_FLAG_S = PF_SDA; \
205 asm("ssync;"); \
206 } \
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100207 else { \
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100208 *pFIO_FLAG_C = PF_SDA; \
209 asm("ssync;"); \
210 }
211#define I2C_SCL(bit) if(bit) { \
212 *pFIO_FLAG_S = PF_SCL; \
213 asm("ssync;"); \
214 } \
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100215 else { \
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100216 *pFIO_FLAG_C = PF_SCL; \
217 asm("ssync;"); \
218 }
219#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
220
221#define CFG_I2C_SPEED 50000
222#define CFG_I2C_SLAVE 0xFE
223
224/*
225 * Compact Flash settings
226 */
227
228/* Enabled below option for CF support */
229/* #define CONFIG_STAMP_CF 1 */
230
231#if defined(CONFIG_STAMP_CF) && (CONFIG_COMMANDS & CFG_CMD_IDE)
232
233#define CONFIG_MISC_INIT_R 1
234#define CONFIG_DOS_PARTITION 1
235
236/*
237 * IDE/ATA stuff
238 */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100239#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
240#undef CONFIG_IDE_LED /* no led for ide supported */
241#undef CONFIG_IDE_RESET /* no reset for ide supported */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100242
243#define CFG_IDE_MAXBUS 1 /* max. 1 IDE busses */
244#define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*1) /* max. 1 drives per IDE bus */
245
246#define CFG_ATA_BASE_ADDR 0x20200000
247#define CFG_ATA_IDE0_OFFSET 0x0000
248
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100249#define CFG_ATA_DATA_OFFSET 0x0020 /* Offset for data I/O */
250#define CFG_ATA_REG_OFFSET 0x0020 /* Offset for normal register accesses */
251#define CFG_ATA_ALT_OFFSET 0x0007 /* Offset for alternate registers */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100252
253#define CFG_ATA_STRIDE 2
254#endif
255
256/*
257 * SDRAM settings
258 *
259 */
260
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100261#define CONFIG_MEM_SIZE 128 /* 128, 64, 32, 16 */
262#define CONFIG_MEM_ADD_WDTH 11 /* 8, 9, 10, 11 */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100263#define CONFIG_MEM_MT48LC64M4A2FB_7E 1
264
265#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
266#define CFG_MEMTEST_END 0x07EFFFFF /* 1 ... 127 MB in DRAM */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100267#define CFG_LOAD_ADDR 0x01000000 /* default load address */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100268
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100269#define CFG_SDRAM_BASE 0x00000000
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100270#define CFG_MAX_RAM_SIZE 0x08000000
271
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100272#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100273#define CFG_MONITOR_BASE (CFG_MAX_RAM_SIZE - CFG_MONITOR_LEN)
274
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100275#if ( CONFIG_CLKIN_HALF == 0 )
276#define CONFIG_VCO_HZ ( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT )
277#else
278#define CONFIG_VCO_HZ (( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT ) / 2 )
279#endif
280
281#if (CONFIG_PLL_BYPASS == 0)
282#define CONFIG_CCLK_HZ ( CONFIG_VCO_HZ / CONFIG_CCLK_DIV )
283#define CONFIG_SCLK_HZ ( CONFIG_VCO_HZ / CONFIG_SCLK_DIV )
284#else
285#define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ
286#define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ
287#endif
288
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100289/*
290 * Miscellaneous configurable options
291 */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100292#define CFG_HZ 1000 /* 1ms time tick */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100293
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100294#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100295#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
296#define CFG_GBL_DATA_SIZE 0x4000
297#define CFG_GBL_DATA_ADDR (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
298#define CONFIG_STACKBASE (CFG_GBL_DATA_ADDR - 4)
299
300#define CFG_LARGE_IMAGE_LEN 0x4000000 /* Large Image Length, set to 64 Meg */
301
302#define CONFIG_SHOW_BOOT_PROGRESS 1 /* Show boot progress on LEDs */
303
304/*
305 * Stack sizes
306 */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100307#define CONFIG_STACKSIZE (128*1024) /* regular stack */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100308
309/*
310 * FLASH organization and environment definitions
311 */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100312#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100313
314/* 0xFF, 0xBBC3BBc3, 0x99B39983 */
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100315/*#define AMGCTLVAL (AMBEN_P0 | AMBEN_P1 | AMBEN_P2 | AMCKEN)
316#define AMBCTL0VAL (B1WAT_11 | B1RAT_11 | B1HT_3 | B1ST_4 | B1TT_4 | B1RDYPOL | \
317 B1RDYEN | B0WAT_11 | B0RAT_11 | B0HT_3 | B0ST_4 | B0TT_4 | B0RDYPOL | B0RDYEN)
318#define AMBCTL1VAL (B3WAT_9 | B3RAT_9 | B3HT_2 | B3ST_3 | B3TT_4 | B3RDYPOL | \
319 B3RDYEN | B2WAT_9 | B2RAT_9 | B2HT_2 | B2ST_4 | B2TT_4 | B2RDYPOL | B2RDYEN)
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100320*/
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100321#define AMGCTLVAL 0xFF
322#define AMBCTL0VAL 0xBBC3BBC3
323#define AMBCTL1VAL 0x99B39983
324#define CF_AMBCTL1VAL 0x99B3ffc2
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100325
326#ifdef CONFIG_VDSP
327#define ET_EXEC_VDSP 0x8
328#define SHT_STRTAB_VDSP 0x1
329#define ELFSHDRSIZE_VDSP 0x2C
330#define VDSP_ENTRY_ADDR 0xFFA00000
331#endif
332
Wolfgang Denk6cb142f2006-03-12 02:12:27 +0100333#endif