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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 73a8b27c574f5ec1c8fdd9d8d065bb845d8743d3 / . / board / rmu / rmu.c
blob: c9925d09a36e049bfe69d7e1674462cbf6578144 [file] [log] [blame]
wdenk73a8b272003-06-05 19:27:42 +0000[diff] [blame^]1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24
25#include <common.h>
26#include <mpc8xx.h>
27
28/* ------------------------------------------------------------------------- */
29
30static long int dram_size (long int, long int *, long int);
31
32/* ------------------------------------------------------------------------- */
33
34#define _NOT_USED_ 0xFFFFCC25
35
36const uint sdram_table[] =
37{
38 /*
39 * Single Read. (Offset 00h in UPMA RAM)
40 */
41 0x0F03CC04, 0x00ACCC24, 0x1FF74C20, _NOT_USED_,
42 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
43
44 /*
45 * Burst Read. (Offset 08h in UPMA RAM)
46 */
47 0x0F03CC04, 0x00ACCC24, 0x00FFCC20, 0x00FFCC20,
48 0x01FFCC20, 0x1FF74C20, _NOT_USED_, _NOT_USED_,
49 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
50 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
51
52 /*
53 * Single Write. (Offset 18h in UPMA RAM)
54 */
55 0x0F03CC02, 0x00AC0C24, 0x1FF74C25, _NOT_USED_,
56 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
57
58 /*
59 * Burst Write. (Offset 20h in UPMA RAM)
60 */
61 0x0F03CC00, 0x00AC0C20, 0x00FFFC20, 0x00FFFC22,
62 0x01FFFC24, 0x1FF74C25, _NOT_USED_, _NOT_USED_,
63 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
64 _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
65
66 /*
67 * Refresh. (Offset 30h in UPMA RAM)
68 * (Initialization code at 0x36)
69 */
70 0x0FF0CC24, 0xFFFFCC24, _NOT_USED_, _NOT_USED_,
71 _NOT_USED_, _NOT_USED_, 0xEFFB8C34, 0x0FF74C34,
72 0x0FFACCB4, 0x0FF5CC34, 0x0FFCC34, 0x0FFFCCB4,
73
74 /*
75 * Exception. (Offset 3Ch in UPMA RAM)
76 */
77 0x0FEA8C34, 0x1FB54C34, 0xFFFFCC34, _NOT_USED_
78};
79
80/* ------------------------------------------------------------------------- */
81
82
83/*
84 * Check Board Identity:
85 */
86
87int checkboard (void)
88{
89 puts ("Board: RMU\n") ;
90 return (0) ;
91}
92
93/* ------------------------------------------------------------------------- */
94
95long int initdram (int board_type)
96{
97 volatile immap_t *immap = (immap_t *)CFG_IMMR;
98 volatile memctl8xx_t *memctl = &immap->im_memctl;
99 long int size10 ;
100
101 upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
102
103 /* Refresh clock prescalar */
104 memctl->memc_mptpr = CFG_MPTPR ;
105
106 memctl->memc_mar = 0x00000088;
107
108 /* Map controller banks 1 to the SDRAM bank */
109 memctl->memc_or1 = CFG_OR1_PRELIM;
110 memctl->memc_br1 = CFG_BR1_PRELIM;
111
112 memctl->memc_mamr = CFG_MAMR_10COL & (~(MAMR_PTAE)); /* no refresh yet */
113
114 udelay(200);
115
116 /* perform SDRAM initializsation sequence */
117
118 memctl->memc_mcr = 0x80002136 ; /* SDRAM bank 0 */
119 udelay(1);
120
121 memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
122
123 udelay (1000);
124
125 /* Check Bank 0 Memory Size
126 * try 10 column mode
127 */
128
129 size10 = dram_size (CFG_MAMR_10COL, (ulong *)SDRAM_BASE_PRELIM, SDRAM_MAX_SIZE) ;
130
131 return (size10);
132}
133
134/* ------------------------------------------------------------------------- */
135
136/*
137 * Check memory range for valid RAM. A simple memory test determines
138 * the actually available RAM size between addresses `base' and
139 * `base + maxsize'. Some (not all) hardware errors are detected:
140 * - short between address lines
141 * - short between data lines
142 */
143
144static long int dram_size (long int mamr_value, long int *base, long int maxsize)
145{
146 volatile immap_t *immap = (immap_t *)CFG_IMMR;
147 volatile memctl8xx_t *memctl = &immap->im_memctl;
148 volatile long int *addr;
149 ulong cnt, val;
150 ulong save[32]; /* to make test non-destructive */
151 unsigned char i = 0;
152
153 memctl->memc_mamr = mamr_value;
154
155 for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) {
156 addr = base + cnt; /* pointer arith! */
157
158 save[i++] = *addr;
159 *addr = ~cnt;
160 }
161
162 /* write 0 to base address */
163 addr = base;
164 save[i] = *addr;
165 *addr = 0;
166
167 /* check at base address */
168 if ((val = *addr) != 0) {
169 *addr = save[i];
170 return (0);
171 }
172
173 for (cnt = 1; cnt <= maxsize/sizeof(long); cnt <<= 1) {
174 addr = base + cnt; /* pointer arith! */
175
176 val = *addr;
177 *addr = save[--i];
178
179 if (val != (~cnt)) {
180 return (cnt * sizeof(long));
181 }
182 }
183 return (maxsize);
184}