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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Wills Wanga2277cc2016-03-16 17:00:00 +08002/*
3 * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
Wills Wanga2277cc2016-03-16 17:00:00 +08004 */
5
Wills Wanga2277cc2016-03-16 17:00:00 +08006#include "skeleton.dtsi"
7
8/ {
9 compatible = "qca,qca953x";
10
11 #address-cells = <1>;
12 #size-cells = <1>;
13
14 cpus {
15 #address-cells = <1>;
16 #size-cells = <0>;
17
18 cpu@0 {
19 device_type = "cpu";
20 compatible = "mips,mips24Kc";
21 reg = <0>;
22 };
23 };
24
25 clocks {
26 #address-cells = <1>;
27 #size-cells = <1>;
28 ranges;
29
30 xtal: xtal {
31 #clock-cells = <0>;
32 compatible = "fixed-clock";
33 clock-output-names = "xtal";
34 };
35 };
36
37 pinctrl {
38 u-boot,dm-pre-reloc;
39 compatible = "qca,qca953x-pinctrl";
40 ranges;
41 #address-cells = <1>;
42 #size-cells = <1>;
43 reg = <0x18040000 0x100>;
44 };
45
46 ahb {
47 compatible = "simple-bus";
48 ranges;
49
50 #address-cells = <1>;
51 #size-cells = <1>;
52
53 apb {
54 compatible = "simple-bus";
55 ranges;
56
57 #address-cells = <1>;
58 #size-cells = <1>;
59
60 uart0: uart@18020000 {
61 compatible = "ns16550";
62 reg = <0x18020000 0x20>;
63 reg-shift = <2>;
64 clock-frequency = <25000000>;
Wills Wanga2277cc2016-03-16 17:00:00 +080065
66 status = "disabled";
67 };
68 };
69
70 spi0: spi@1f000000 {
71 compatible = "qca,ar7100-spi";
72 reg = <0x1f000000 0x10>;
Wills Wanga2277cc2016-03-16 17:00:00 +080073
74 status = "disabled";
75
76 #address-cells = <1>;
77 #size-cells = <0>;
78 };
79 };
80};