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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Matthias Weisser39f0023e2011-07-06 00:28:33 +00002/*
3 * (c) 2011 Graf-Syteco, Matthias Weisser
4 * <weisserm@arcor.de>
5 *
6 * Configuation settings for the zmx25 board
Matthias Weisser39f0023e2011-07-06 00:28:33 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Rob Herring3dae5b52013-10-04 10:22:44 -050012#include <asm/arch/imx-regs.h>
13
Rob Herring3dae5b52013-10-04 10:22:44 -050014#define CONFIG_SYS_TIMER_RATE 32768
15#define CONFIG_SYS_TIMER_COUNTER \
16 (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
17
Matthias Weisser39f0023e2011-07-06 00:28:33 +000018/*
19 * Environment settings
20 */
21#define CONFIG_EXTRA_ENV_SETTINGS \
22 "gs_fast_boot=setenv bootdelay 5\0" \
23 "gs_slow_boot=setenv bootdelay 10\0" \
24 "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \
25 "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \
26 "bootm 0x81000000; bootelf 0x81000000\0"
27
Matthias Weisser39f0023e2011-07-06 00:28:33 +000028/*
Matthias Weisser39f0023e2011-07-06 00:28:33 +000029 * Hardware drivers
30 */
31
32/*
Matthias Weisser39f0023e2011-07-06 00:28:33 +000033 * Serial
34 */
Stefano Babic40f6fff2011-11-22 15:22:39 +010035#define CONFIG_MXC_UART_BASE UART2_BASE
Matthias Weisser39f0023e2011-07-06 00:28:33 +000036
37/*
38 * Ethernet
39 */
40#define CONFIG_FEC_MXC
41#define CONFIG_FEC_MXC_PHYADDR 0x00
Matthias Weisser39f0023e2011-07-06 00:28:33 +000042
43/*
44 * BOOTP options
45 */
46#define CONFIG_BOOTP_BOOTFILESIZE
Matthias Weisser39f0023e2011-07-06 00:28:33 +000047
48/*
Matthias Weisser39f0023e2011-07-06 00:28:33 +000049 * USB
50 */
51#ifdef CONFIG_CMD_USB
Matthias Weisser39f0023e2011-07-06 00:28:33 +000052#define CONFIG_USB_EHCI_MXC
53#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
Benoît Thébaudeau9fa3d092012-11-13 09:57:48 +000054#define CONFIG_MXC_USB_PORT 1
55#define CONFIG_MXC_USB_PORTSC MXC_EHCI_MODE_SERIAL
56#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN)
Matthias Weisser39f0023e2011-07-06 00:28:33 +000057#define CONFIG_EHCI_IS_TDI
Matthias Weisser39f0023e2011-07-06 00:28:33 +000058#endif /* CONFIG_CMD_USB */
59
60/* SDRAM */
Matthias Weisser39f0023e2011-07-06 00:28:33 +000061#define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */
62#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
63
64#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
65#define CONFIG_SYS_INIT_SP_ADDR 0x78020000 /* end of internal SRAM */
66
67/*
68 * FLASH and environment organization
69 */
70#define CONFIG_SYS_FLASH_BASE 0xA0000000
71#define CONFIG_SYS_MAX_FLASH_BANKS 1
72#define CONFIG_SYS_MAX_FLASH_SECT 256
73
Matthias Weisser39f0023e2011-07-06 00:28:33 +000074/*
75 * CFI FLASH driver setup
76 */
Matthias Weisser39f0023e2011-07-06 00:28:33 +000077
Matthias Weisser39f0023e2011-07-06 00:28:33 +000078#endif /* __CONFIG_H */