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Boris Brezillond13f5b22018-08-16 17:30:11 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Exceet Electronics GmbH
4 * Copyright (C) 2018 Bootlin
5 *
6 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
7 */
8
9#ifndef __UBOOT__
10#include <linux/dmaengine.h>
11#include <linux/pm_runtime.h>
12#include "internals.h"
13#else
14#include <spi.h>
15#include <spi-mem.h>
16#endif
17
18#ifndef __UBOOT__
19/**
20 * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
21 * memory operation
22 * @ctlr: the SPI controller requesting this dma_map()
23 * @op: the memory operation containing the buffer to map
24 * @sgt: a pointer to a non-initialized sg_table that will be filled by this
25 * function
26 *
27 * Some controllers might want to do DMA on the data buffer embedded in @op.
28 * This helper prepares everything for you and provides a ready-to-use
29 * sg_table. This function is not intended to be called from spi drivers.
30 * Only SPI controller drivers should use it.
31 * Note that the caller must ensure the memory region pointed by
32 * op->data.buf.{in,out} is DMA-able before calling this function.
33 *
34 * Return: 0 in case of success, a negative error code otherwise.
35 */
36int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
37 const struct spi_mem_op *op,
38 struct sg_table *sgt)
39{
40 struct device *dmadev;
41
42 if (!op->data.nbytes)
43 return -EINVAL;
44
45 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
46 dmadev = ctlr->dma_tx->device->dev;
47 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
48 dmadev = ctlr->dma_rx->device->dev;
49 else
50 dmadev = ctlr->dev.parent;
51
52 if (!dmadev)
53 return -EINVAL;
54
55 return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
56 op->data.dir == SPI_MEM_DATA_IN ?
57 DMA_FROM_DEVICE : DMA_TO_DEVICE);
58}
59EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
60
61/**
62 * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
63 * memory operation
64 * @ctlr: the SPI controller requesting this dma_unmap()
65 * @op: the memory operation containing the buffer to unmap
66 * @sgt: a pointer to an sg_table previously initialized by
67 * spi_controller_dma_map_mem_op_data()
68 *
69 * Some controllers might want to do DMA on the data buffer embedded in @op.
70 * This helper prepares things so that the CPU can access the
71 * op->data.buf.{in,out} buffer again.
72 *
73 * This function is not intended to be called from SPI drivers. Only SPI
74 * controller drivers should use it.
75 *
76 * This function should be called after the DMA operation has finished and is
77 * only valid if the previous spi_controller_dma_map_mem_op_data() call
78 * returned 0.
79 *
80 * Return: 0 in case of success, a negative error code otherwise.
81 */
82void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
83 const struct spi_mem_op *op,
84 struct sg_table *sgt)
85{
86 struct device *dmadev;
87
88 if (!op->data.nbytes)
89 return;
90
91 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
92 dmadev = ctlr->dma_tx->device->dev;
93 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
94 dmadev = ctlr->dma_rx->device->dev;
95 else
96 dmadev = ctlr->dev.parent;
97
98 spi_unmap_buf(ctlr, dmadev, sgt,
99 op->data.dir == SPI_MEM_DATA_IN ?
100 DMA_FROM_DEVICE : DMA_TO_DEVICE);
101}
102EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
103#endif /* __UBOOT__ */
104
105static int spi_check_buswidth_req(struct spi_slave *slave, u8 buswidth, bool tx)
106{
107 u32 mode = slave->mode;
108
109 switch (buswidth) {
110 case 1:
111 return 0;
112
113 case 2:
114 if ((tx && (mode & (SPI_TX_DUAL | SPI_TX_QUAD))) ||
115 (!tx && (mode & (SPI_RX_DUAL | SPI_RX_QUAD))))
116 return 0;
117
118 break;
119
120 case 4:
121 if ((tx && (mode & SPI_TX_QUAD)) ||
122 (!tx && (mode & SPI_RX_QUAD)))
123 return 0;
124
125 break;
126
127 default:
128 break;
129 }
130
131 return -ENOTSUPP;
132}
133
134bool spi_mem_default_supports_op(struct spi_slave *slave,
135 const struct spi_mem_op *op)
136{
137 if (spi_check_buswidth_req(slave, op->cmd.buswidth, true))
138 return false;
139
140 if (op->addr.nbytes &&
141 spi_check_buswidth_req(slave, op->addr.buswidth, true))
142 return false;
143
144 if (op->dummy.nbytes &&
145 spi_check_buswidth_req(slave, op->dummy.buswidth, true))
146 return false;
147
148 if (op->data.nbytes &&
149 spi_check_buswidth_req(slave, op->data.buswidth,
150 op->data.dir == SPI_MEM_DATA_OUT))
151 return false;
152
153 return true;
154}
155EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
156
157/**
158 * spi_mem_supports_op() - Check if a memory device and the controller it is
159 * connected to support a specific memory operation
160 * @slave: the SPI device
161 * @op: the memory operation to check
162 *
163 * Some controllers are only supporting Single or Dual IOs, others might only
164 * support specific opcodes, or it can even be that the controller and device
165 * both support Quad IOs but the hardware prevents you from using it because
166 * only 2 IO lines are connected.
167 *
168 * This function checks whether a specific operation is supported.
169 *
170 * Return: true if @op is supported, false otherwise.
171 */
172bool spi_mem_supports_op(struct spi_slave *slave,
173 const struct spi_mem_op *op)
174{
175 struct udevice *bus = slave->dev->parent;
176 struct dm_spi_ops *ops = spi_get_ops(bus);
177
178 if (ops->mem_ops && ops->mem_ops->supports_op)
179 return ops->mem_ops->supports_op(slave, op);
180
181 return spi_mem_default_supports_op(slave, op);
182}
183EXPORT_SYMBOL_GPL(spi_mem_supports_op);
184
185/**
186 * spi_mem_exec_op() - Execute a memory operation
187 * @slave: the SPI device
188 * @op: the memory operation to execute
189 *
190 * Executes a memory operation.
191 *
192 * This function first checks that @op is supported and then tries to execute
193 * it.
194 *
195 * Return: 0 in case of success, a negative error code otherwise.
196 */
197int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
198{
199 struct udevice *bus = slave->dev->parent;
200 struct dm_spi_ops *ops = spi_get_ops(bus);
201 unsigned int pos = 0;
202 const u8 *tx_buf = NULL;
203 u8 *rx_buf = NULL;
Boris Brezillond13f5b22018-08-16 17:30:11 +0200204 int op_len;
205 u32 flag;
206 int ret;
207 int i;
208
209 if (!spi_mem_supports_op(slave, op))
210 return -ENOTSUPP;
211
Vignesh R76094482019-02-05 11:29:14 +0530212 ret = spi_claim_bus(slave);
213 if (ret < 0)
214 return ret;
215
Bernhard Messerklinger567a3eb2019-03-26 10:01:24 +0100216 if (ops->mem_ops && ops->mem_ops->exec_op) {
Boris Brezillond13f5b22018-08-16 17:30:11 +0200217#ifndef __UBOOT__
218 /*
219 * Flush the message queue before executing our SPI memory
220 * operation to prevent preemption of regular SPI transfers.
221 */
222 spi_flush_queue(ctlr);
223
224 if (ctlr->auto_runtime_pm) {
225 ret = pm_runtime_get_sync(ctlr->dev.parent);
226 if (ret < 0) {
227 dev_err(&ctlr->dev,
228 "Failed to power device: %d\n",
229 ret);
230 return ret;
231 }
232 }
233
234 mutex_lock(&ctlr->bus_lock_mutex);
235 mutex_lock(&ctlr->io_mutex);
236#endif
237 ret = ops->mem_ops->exec_op(slave, op);
Vignesh R76094482019-02-05 11:29:14 +0530238
Boris Brezillond13f5b22018-08-16 17:30:11 +0200239#ifndef __UBOOT__
240 mutex_unlock(&ctlr->io_mutex);
241 mutex_unlock(&ctlr->bus_lock_mutex);
242
243 if (ctlr->auto_runtime_pm)
244 pm_runtime_put(ctlr->dev.parent);
245#endif
246
247 /*
248 * Some controllers only optimize specific paths (typically the
249 * read path) and expect the core to use the regular SPI
250 * interface in other cases.
251 */
Vignesh R76094482019-02-05 11:29:14 +0530252 if (!ret || ret != -ENOTSUPP) {
253 spi_release_bus(slave);
Boris Brezillond13f5b22018-08-16 17:30:11 +0200254 return ret;
Vignesh R76094482019-02-05 11:29:14 +0530255 }
Boris Brezillond13f5b22018-08-16 17:30:11 +0200256 }
257
258#ifndef __UBOOT__
259 tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes +
260 op->dummy.nbytes;
261
262 /*
263 * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
264 * we're guaranteed that this buffer is DMA-able, as required by the
265 * SPI layer.
266 */
267 tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
268 if (!tmpbuf)
269 return -ENOMEM;
270
271 spi_message_init(&msg);
272
273 tmpbuf[0] = op->cmd.opcode;
274 xfers[xferpos].tx_buf = tmpbuf;
275 xfers[xferpos].len = sizeof(op->cmd.opcode);
276 xfers[xferpos].tx_nbits = op->cmd.buswidth;
277 spi_message_add_tail(&xfers[xferpos], &msg);
278 xferpos++;
279 totalxferlen++;
280
281 if (op->addr.nbytes) {
282 int i;
283
284 for (i = 0; i < op->addr.nbytes; i++)
285 tmpbuf[i + 1] = op->addr.val >>
286 (8 * (op->addr.nbytes - i - 1));
287
288 xfers[xferpos].tx_buf = tmpbuf + 1;
289 xfers[xferpos].len = op->addr.nbytes;
290 xfers[xferpos].tx_nbits = op->addr.buswidth;
291 spi_message_add_tail(&xfers[xferpos], &msg);
292 xferpos++;
293 totalxferlen += op->addr.nbytes;
294 }
295
296 if (op->dummy.nbytes) {
297 memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
298 xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
299 xfers[xferpos].len = op->dummy.nbytes;
300 xfers[xferpos].tx_nbits = op->dummy.buswidth;
301 spi_message_add_tail(&xfers[xferpos], &msg);
302 xferpos++;
303 totalxferlen += op->dummy.nbytes;
304 }
305
306 if (op->data.nbytes) {
307 if (op->data.dir == SPI_MEM_DATA_IN) {
308 xfers[xferpos].rx_buf = op->data.buf.in;
309 xfers[xferpos].rx_nbits = op->data.buswidth;
310 } else {
311 xfers[xferpos].tx_buf = op->data.buf.out;
312 xfers[xferpos].tx_nbits = op->data.buswidth;
313 }
314
315 xfers[xferpos].len = op->data.nbytes;
316 spi_message_add_tail(&xfers[xferpos], &msg);
317 xferpos++;
318 totalxferlen += op->data.nbytes;
319 }
320
321 ret = spi_sync(slave, &msg);
322
323 kfree(tmpbuf);
324
325 if (ret)
326 return ret;
327
328 if (msg.actual_length != totalxferlen)
329 return -EIO;
330#else
331
Boris Brezillond13f5b22018-08-16 17:30:11 +0200332 if (op->data.nbytes) {
333 if (op->data.dir == SPI_MEM_DATA_IN)
334 rx_buf = op->data.buf.in;
335 else
336 tx_buf = op->data.buf.out;
337 }
338
339 op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
Simon Glassca2abb72019-05-18 11:59:54 -0600340
341 /*
342 * Avoid using malloc() here so that we can use this code in SPL where
343 * simple malloc may be used. That implementation does not allow free()
344 * so repeated calls to this code can exhaust the space.
345 *
346 * The value of op_len is small, since it does not include the actual
347 * data being sent, only the op-code and address. In fact, it should be
348 * possible to just use a small fixed value here instead of op_len.
349 */
350 u8 op_buf[op_len];
Boris Brezillond13f5b22018-08-16 17:30:11 +0200351
Boris Brezillond13f5b22018-08-16 17:30:11 +0200352 op_buf[pos++] = op->cmd.opcode;
353
354 if (op->addr.nbytes) {
355 for (i = 0; i < op->addr.nbytes; i++)
356 op_buf[pos + i] = op->addr.val >>
357 (8 * (op->addr.nbytes - i - 1));
358
359 pos += op->addr.nbytes;
360 }
361
362 if (op->dummy.nbytes)
363 memset(op_buf + pos, 0xff, op->dummy.nbytes);
364
365 /* 1st transfer: opcode + address + dummy cycles */
366 flag = SPI_XFER_BEGIN;
367 /* Make sure to set END bit if no tx or rx data messages follow */
368 if (!tx_buf && !rx_buf)
369 flag |= SPI_XFER_END;
370
371 ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
372 if (ret)
373 return ret;
374
375 /* 2nd transfer: rx or tx data path */
376 if (tx_buf || rx_buf) {
377 ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
378 rx_buf, SPI_XFER_END);
379 if (ret)
380 return ret;
381 }
382
383 spi_release_bus(slave);
384
385 for (i = 0; i < pos; i++)
386 debug("%02x ", op_buf[i]);
387 debug("| [%dB %s] ",
388 tx_buf || rx_buf ? op->data.nbytes : 0,
389 tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
390 for (i = 0; i < op->data.nbytes; i++)
391 debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
392 debug("[ret %d]\n", ret);
393
Boris Brezillond13f5b22018-08-16 17:30:11 +0200394 if (ret < 0)
395 return ret;
396#endif /* __UBOOT__ */
397
398 return 0;
399}
400EXPORT_SYMBOL_GPL(spi_mem_exec_op);
401
402/**
403 * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
404 * match controller limitations
405 * @slave: the SPI device
406 * @op: the operation to adjust
407 *
408 * Some controllers have FIFO limitations and must split a data transfer
409 * operation into multiple ones, others require a specific alignment for
410 * optimized accesses. This function allows SPI mem drivers to split a single
411 * operation into multiple sub-operations when required.
412 *
413 * Return: a negative error code if the controller can't properly adjust @op,
414 * 0 otherwise. Note that @op->data.nbytes will be updated if @op
415 * can't be handled in a single step.
416 */
417int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op)
418{
419 struct udevice *bus = slave->dev->parent;
420 struct dm_spi_ops *ops = spi_get_ops(bus);
421
422 if (ops->mem_ops && ops->mem_ops->adjust_op_size)
423 return ops->mem_ops->adjust_op_size(slave, op);
424
Vignesh R12563f72019-02-05 11:29:13 +0530425 if (!ops->mem_ops || !ops->mem_ops->exec_op) {
426 unsigned int len;
427
428 len = sizeof(op->cmd.opcode) + op->addr.nbytes +
429 op->dummy.nbytes;
430 if (slave->max_write_size && len > slave->max_write_size)
431 return -EINVAL;
432
Ye Li535b1fd2019-07-10 09:23:51 +0000433 if (op->data.dir == SPI_MEM_DATA_IN) {
434 if (slave->max_read_size)
435 op->data.nbytes = min(op->data.nbytes,
Vignesh R12563f72019-02-05 11:29:13 +0530436 slave->max_read_size);
Ye Li535b1fd2019-07-10 09:23:51 +0000437 } else if (slave->max_write_size) {
Vignesh R12563f72019-02-05 11:29:13 +0530438 op->data.nbytes = min(op->data.nbytes,
439 slave->max_write_size - len);
Ye Li535b1fd2019-07-10 09:23:51 +0000440 }
Vignesh R12563f72019-02-05 11:29:13 +0530441
442 if (!op->data.nbytes)
443 return -EINVAL;
444 }
445
Boris Brezillond13f5b22018-08-16 17:30:11 +0200446 return 0;
447}
448EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
449
450#ifndef __UBOOT__
451static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
452{
453 return container_of(drv, struct spi_mem_driver, spidrv.driver);
454}
455
456static int spi_mem_probe(struct spi_device *spi)
457{
458 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
459 struct spi_mem *mem;
460
461 mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
462 if (!mem)
463 return -ENOMEM;
464
465 mem->spi = spi;
466 spi_set_drvdata(spi, mem);
467
468 return memdrv->probe(mem);
469}
470
471static int spi_mem_remove(struct spi_device *spi)
472{
473 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
474 struct spi_mem *mem = spi_get_drvdata(spi);
475
476 if (memdrv->remove)
477 return memdrv->remove(mem);
478
479 return 0;
480}
481
482static void spi_mem_shutdown(struct spi_device *spi)
483{
484 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
485 struct spi_mem *mem = spi_get_drvdata(spi);
486
487 if (memdrv->shutdown)
488 memdrv->shutdown(mem);
489}
490
491/**
492 * spi_mem_driver_register_with_owner() - Register a SPI memory driver
493 * @memdrv: the SPI memory driver to register
494 * @owner: the owner of this driver
495 *
496 * Registers a SPI memory driver.
497 *
498 * Return: 0 in case of success, a negative error core otherwise.
499 */
500
501int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
502 struct module *owner)
503{
504 memdrv->spidrv.probe = spi_mem_probe;
505 memdrv->spidrv.remove = spi_mem_remove;
506 memdrv->spidrv.shutdown = spi_mem_shutdown;
507
508 return __spi_register_driver(owner, &memdrv->spidrv);
509}
510EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
511
512/**
513 * spi_mem_driver_unregister_with_owner() - Unregister a SPI memory driver
514 * @memdrv: the SPI memory driver to unregister
515 *
516 * Unregisters a SPI memory driver.
517 */
518void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
519{
520 spi_unregister_driver(&memdrv->spidrv);
521}
522EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);
523#endif /* __UBOOT__ */