blob: 5686a5b9104ee89c9788b29d84d5dc7af0085a73 [file] [log] [blame]
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +09001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2016-2017 Socionext Inc.
4 */
5#ifndef __CONFIG_H
6#define __CONFIG_H
7
8/* Timers for fasp(TIMCLK) */
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +09009#define CONFIG_SYS_TIMERBASE 0x31080000 /* AP Timer 1 (ARM-SP804) */
10
11/*
12 * SDRAM (for initialize)
13 */
14#define CONFIG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */
15#define PHYS_SDRAM_SIZE (0x7c000000) /* Default size (2GB - Secure memory) */
16
17#define CONFIG_VERY_BIG_RAM /* SynQuacer supports up to 64GB */
18#define CONFIG_MAX_MEM_MAPPED PHYS_SDRAM_SIZE
19
20#define SQ_DRAMINFO_BASE (0x2e00ffc0) /* DRAM info from TF-A */
21
22/*
23 * Boot info
24 */
25#define CONFIG_SYS_INIT_SP_ADDR (0xe0000000) /* stack of init proccess */
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090026
27/*
28 * Hardware drivers support
29 */
30
31/* RTC */
32#define CONFIG_SYS_I2C_RTC_ADDR 0x51
33
34/* Serial (pl011) */
35#define UART_CLK (62500000)
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090036#define CONFIG_PL011_CLOCK UART_CLK
37#define CONFIG_PL01x_PORTS {(void *)(0x2a400000)}
38
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090039/* Support MTD */
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090040#define CONFIG_SYS_FLASH_BASE (0x08000000)
41#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE}
42
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090043#define CONFIG_SYS_CBSIZE 1024
44#define CONFIG_SYS_MAXARGS 128
45#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
46
47/* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090048
Masami Hiramatsu3a373862021-06-04 18:45:31 +090049#define DEFAULT_DFU_ALT_INFO "dfu_alt_info=" \
Masami Hiramatsu4d492b02021-11-10 09:40:07 +090050 "mtd nor1=u-boot.bin raw 200000 100000;" \
Masami Hiramatsu3a373862021-06-04 18:45:31 +090051 "fip.bin raw 180000 78000;" \
52 "optee.bin raw 500000 100000\0"
53
Sughosh Ganu741ef862022-04-15 11:29:34 +053054/* GUIDs for capsule updatable firmware images */
55#define DEVELOPERBOX_UBOOT_IMAGE_GUID \
56 EFI_GUID(0x53a92e83, 0x4ef4, 0x473a, 0x8b, 0x0d, \
57 0xb5, 0xd8, 0xc7, 0xb2, 0xd6, 0x00)
58
59#define DEVELOPERBOX_FIP_IMAGE_GUID \
60 EFI_GUID(0x880866e9, 0x84ba, 0x4793, 0xa9, 0x08, \
61 0x33, 0xe0, 0xb9, 0x16, 0xf3, 0x98)
62
63#define DEVELOPERBOX_OPTEE_IMAGE_GUID \
64 EFI_GUID(0xc1b629f1, 0xce0e, 0x4894, 0x82, 0xbf, \
65 0xf0, 0xa3, 0x83, 0x87, 0xe6, 0x30)
66
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +090067/* Distro boot settings */
68#ifndef CONFIG_SPL_BUILD
69#ifdef CONFIG_CMD_USB
70#define BOOT_TARGET_DEVICE_USB(func) func(USB, usb, 0)
71#else
72#define BOOT_TARGET_DEVICE_USB(func)
73#endif
74
75#ifdef CONFIG_CMD_MMC
76#define BOOT_TARGET_DEVICE_MMC(func) func(MMC, mmc, 0)
77#else
78#define BOOT_TARGET_DEVICE_MMC(func)
79#endif
80
81#ifdef CONFIG_CMD_NVME
82#define BOOT_TARGET_DEVICE_NVME(func) func(NVME, nvme, 0)
83#else
84#define BOOT_TARGET_DEVICE_NVME(func)
85#endif
86
87#ifdef CONFIG_CMD_SCSI
88#define BOOT_TARGET_DEVICE_SCSI(func) func(SCSI, scsi, 0) func(SCSI, scsi, 1)
89#else
90#define BOOT_TARGET_DEVICE_SCSI(func)
91#endif
92
93#define BOOT_TARGET_DEVICES(func) \
94 BOOT_TARGET_DEVICE_USB(func) \
95 BOOT_TARGET_DEVICE_MMC(func) \
96 BOOT_TARGET_DEVICE_SCSI(func) \
97 BOOT_TARGET_DEVICE_NVME(func) \
98
99#include <config_distro_bootcmd.h>
100#else /* CONFIG_SPL_BUILD */
101#define BOOTENV
102#endif
103
104#define CONFIG_EXTRA_ENV_SETTINGS \
105 "fdt_addr_r=0x9fe00000\0" \
106 "kernel_addr_r=0x90000000\0" \
107 "ramdisk_addr_r=0xa0000000\0" \
108 "scriptaddr=0x88000000\0" \
109 "pxefile_addr_r=0x88100000\0" \
Masami Hiramatsu3a373862021-06-04 18:45:31 +0900110 DEFAULT_DFU_ALT_INFO \
Masami Hiramatsu5cd4a352021-06-04 18:45:10 +0900111 BOOTENV
112
113#endif /* __CONFIG_H */