blob: 34cd5af82b2de1504d16cbfe5603f370595dd118 [file] [log] [blame]
Wolfgang Denk74f43042005-09-25 01:48:28 +02001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28/*
29 * CPU specific code for an unknown cpu
30 * - hence fairly empty......
31 */
32
33#include <common.h>
34#include <command.h>
35
36int cpu_init (void)
37{
38 /*
39 * setup up stacks if necessary
40 */
41#ifdef CONFIG_USE_IRQ
42 DECLARE_GLOBAL_DATA_PTR;
43
44 IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
45 FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
46#endif
47 return 0;
48}
49
50int cleanup_before_linux (void)
51{
52 /*
53 * this function is called just before we call linux
54 * it prepares the processor for linux
55 *
56 * we turn off caches etc ...
57 */
58
59 disable_interrupts ();
60
61 /* Since the CM has unknown processor we do not support
62 * cache operations
63 */
64
65 return (0);
66}
67
68int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
69{
70 extern void reset_cpu (ulong addr);
71
72 disable_interrupts ();
73 reset_cpu (0);
74 /*NOTREACHED*/
75 return (0);
76}
77
78/* May not be cahed processor on the CM - do nothing */
79void icache_enable (void)
80{
81}
82
83void icache_disable (void)
84{
85}
86
87/* return "disabled" */
88int icache_status (void)
89{
90 return 0;
91}