Masahiro Yamada | 0b11dbf | 2015-07-26 02:46:26 +0900 | [diff] [blame] | 1 | # |
| 2 | # Video configuration |
| 3 | # |
| 4 | |
| 5 | menu "Graphics support" |
| 6 | |
Simon Glass | 1acafc7 | 2016-01-18 19:52:15 -0700 | [diff] [blame] | 7 | config DM_VIDEO |
| 8 | bool "Enable driver model support for LCD/video" |
| 9 | depends on DM |
| 10 | help |
| 11 | This enables driver model for LCD and video devices. These support |
| 12 | a bitmap display of various sizes and depths which can be drawn on |
| 13 | to display a command-line console or splash screen. Enabling this |
| 14 | option compiles in the video uclass and routes all LCD/video access |
| 15 | through this. |
| 16 | |
| 17 | config VIDEO_BPP8 |
| 18 | bool "Support 8-bit-per-pixel displays" |
| 19 | depends on DM_VIDEO |
| 20 | default y if DM_VIDEO |
| 21 | help |
| 22 | Support drawing text and bitmaps onto a 8-bit-per-pixel display. |
| 23 | Enabling this will include code to support this display. Without |
| 24 | this option, such displays will not be supported and console output |
| 25 | will be empty. |
| 26 | |
| 27 | config VIDEO_BPP16 |
| 28 | bool "Support 16-bit-per-pixel displays" |
| 29 | depends on DM_VIDEO |
| 30 | default y if DM_VIDEO |
| 31 | help |
| 32 | Support drawing text and bitmaps onto a 16-bit-per-pixel display. |
| 33 | Enabling this will include code to support this display. Without |
| 34 | this option, such displays will not be supported and console output |
| 35 | will be empty. |
| 36 | |
| 37 | config VIDEO_BPP32 |
| 38 | bool "Support 32-bit-per-pixel displays" |
| 39 | depends on DM_VIDEO |
| 40 | default y if DM_VIDEO |
| 41 | help |
| 42 | Support drawing text and bitmaps onto a 32-bit-per-pixel display. |
| 43 | Enabling this will include code to support this display. Without |
| 44 | this option, such displays will not be supported and console output |
| 45 | will be empty. |
| 46 | |
Simon Glass | b5146b2 | 2016-01-18 19:52:19 -0700 | [diff] [blame] | 47 | config VIDEO_ROTATION |
| 48 | bool "Support rotated displays" |
| 49 | depends on DM_VIDEO |
| 50 | help |
| 51 | Sometimes, for example if the display is mounted in portrait |
| 52 | mode or even if it's mounted landscape but rotated by 180degree, |
| 53 | we need to rotate our content of the display relative to the |
| 54 | framebuffer, so that user can read the messages which are |
| 55 | printed out. Enable this option to include a text driver which can |
| 56 | support this. The rotation is set by the 'rot' parameter in |
| 57 | struct video_priv: 0=unrotated, 1=90 degrees clockwise, 2=180 |
| 58 | degrees, 3=270 degrees. |
| 59 | |
Simon Glass | 6b1ba98 | 2014-12-29 19:32:28 -0700 | [diff] [blame] | 60 | config VIDEO_VESA |
| 61 | bool "Enable VESA video driver support" |
Simon Glass | 6b1ba98 | 2014-12-29 19:32:28 -0700 | [diff] [blame] | 62 | default n |
| 63 | help |
| 64 | Turn on this option to enable a very simple driver which uses vesa |
| 65 | to discover the video mode and then provides a frame buffer for use |
| 66 | by U-Boot. This can in principle be used with any platform that |
| 67 | supports PCI and video cards that support VESA BIOS Extension (VBE). |
| 68 | |
Bin Meng | 6bde2dc | 2015-05-11 07:36:29 +0800 | [diff] [blame] | 69 | config FRAMEBUFFER_SET_VESA_MODE |
| 70 | bool "Set framebuffer graphics resolution" |
| 71 | depends on VIDEO_VESA |
| 72 | help |
| 73 | Set VESA/native framebuffer mode (needed for bootsplash and graphical |
| 74 | framebuffer console) |
| 75 | |
| 76 | choice |
| 77 | prompt "framebuffer graphics resolution" |
| 78 | default FRAMEBUFFER_VESA_MODE_117 |
| 79 | depends on FRAMEBUFFER_SET_VESA_MODE |
| 80 | help |
| 81 | This option sets the resolution used for the U-Boot framebuffer (and |
| 82 | bootsplash screen). |
| 83 | |
| 84 | config FRAMEBUFFER_VESA_MODE_100 |
| 85 | bool "640x400 256-color" |
| 86 | |
| 87 | config FRAMEBUFFER_VESA_MODE_101 |
| 88 | bool "640x480 256-color" |
| 89 | |
| 90 | config FRAMEBUFFER_VESA_MODE_102 |
| 91 | bool "800x600 16-color" |
| 92 | |
| 93 | config FRAMEBUFFER_VESA_MODE_103 |
| 94 | bool "800x600 256-color" |
| 95 | |
| 96 | config FRAMEBUFFER_VESA_MODE_104 |
| 97 | bool "1024x768 16-color" |
| 98 | |
| 99 | config FRAMEBUFFER_VESA_MODE_105 |
Bin Meng | 57dccb5 | 2015-08-09 23:26:59 -0700 | [diff] [blame] | 100 | bool "1024x768 256-color" |
Bin Meng | 6bde2dc | 2015-05-11 07:36:29 +0800 | [diff] [blame] | 101 | |
| 102 | config FRAMEBUFFER_VESA_MODE_106 |
| 103 | bool "1280x1024 16-color" |
| 104 | |
| 105 | config FRAMEBUFFER_VESA_MODE_107 |
| 106 | bool "1280x1024 256-color" |
| 107 | |
| 108 | config FRAMEBUFFER_VESA_MODE_108 |
| 109 | bool "80x60 text" |
| 110 | |
| 111 | config FRAMEBUFFER_VESA_MODE_109 |
| 112 | bool "132x25 text" |
| 113 | |
| 114 | config FRAMEBUFFER_VESA_MODE_10A |
| 115 | bool "132x43 text" |
| 116 | |
| 117 | config FRAMEBUFFER_VESA_MODE_10B |
| 118 | bool "132x50 text" |
| 119 | |
| 120 | config FRAMEBUFFER_VESA_MODE_10C |
| 121 | bool "132x60 text" |
| 122 | |
| 123 | config FRAMEBUFFER_VESA_MODE_10D |
| 124 | bool "320x200 32k-color (1:5:5:5)" |
| 125 | |
| 126 | config FRAMEBUFFER_VESA_MODE_10E |
| 127 | bool "320x200 64k-color (5:6:5)" |
| 128 | |
| 129 | config FRAMEBUFFER_VESA_MODE_10F |
| 130 | bool "320x200 16.8M-color (8:8:8)" |
| 131 | |
| 132 | config FRAMEBUFFER_VESA_MODE_110 |
| 133 | bool "640x480 32k-color (1:5:5:5)" |
| 134 | |
| 135 | config FRAMEBUFFER_VESA_MODE_111 |
| 136 | bool "640x480 64k-color (5:6:5)" |
| 137 | |
| 138 | config FRAMEBUFFER_VESA_MODE_112 |
| 139 | bool "640x480 16.8M-color (8:8:8)" |
| 140 | |
| 141 | config FRAMEBUFFER_VESA_MODE_113 |
| 142 | bool "800x600 32k-color (1:5:5:5)" |
| 143 | |
| 144 | config FRAMEBUFFER_VESA_MODE_114 |
| 145 | bool "800x600 64k-color (5:6:5)" |
| 146 | |
| 147 | config FRAMEBUFFER_VESA_MODE_115 |
| 148 | bool "800x600 16.8M-color (8:8:8)" |
| 149 | |
| 150 | config FRAMEBUFFER_VESA_MODE_116 |
| 151 | bool "1024x768 32k-color (1:5:5:5)" |
| 152 | |
| 153 | config FRAMEBUFFER_VESA_MODE_117 |
| 154 | bool "1024x768 64k-color (5:6:5)" |
| 155 | |
| 156 | config FRAMEBUFFER_VESA_MODE_118 |
| 157 | bool "1024x768 16.8M-color (8:8:8)" |
| 158 | |
| 159 | config FRAMEBUFFER_VESA_MODE_119 |
| 160 | bool "1280x1024 32k-color (1:5:5:5)" |
| 161 | |
| 162 | config FRAMEBUFFER_VESA_MODE_11A |
| 163 | bool "1280x1024 64k-color (5:6:5)" |
| 164 | |
| 165 | config FRAMEBUFFER_VESA_MODE_11B |
| 166 | bool "1280x1024 16.8M-color (8:8:8)" |
| 167 | |
| 168 | config FRAMEBUFFER_VESA_MODE_USER |
| 169 | bool "Manually select VESA mode" |
| 170 | |
| 171 | endchoice |
| 172 | |
| 173 | # Map the config names to an integer (KB). |
| 174 | config FRAMEBUFFER_VESA_MODE |
| 175 | prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER |
| 176 | hex |
| 177 | default 0x100 if FRAMEBUFFER_VESA_MODE_100 |
| 178 | default 0x101 if FRAMEBUFFER_VESA_MODE_101 |
| 179 | default 0x102 if FRAMEBUFFER_VESA_MODE_102 |
| 180 | default 0x103 if FRAMEBUFFER_VESA_MODE_103 |
| 181 | default 0x104 if FRAMEBUFFER_VESA_MODE_104 |
| 182 | default 0x105 if FRAMEBUFFER_VESA_MODE_105 |
| 183 | default 0x106 if FRAMEBUFFER_VESA_MODE_106 |
| 184 | default 0x107 if FRAMEBUFFER_VESA_MODE_107 |
| 185 | default 0x108 if FRAMEBUFFER_VESA_MODE_108 |
| 186 | default 0x109 if FRAMEBUFFER_VESA_MODE_109 |
| 187 | default 0x10A if FRAMEBUFFER_VESA_MODE_10A |
| 188 | default 0x10B if FRAMEBUFFER_VESA_MODE_10B |
| 189 | default 0x10C if FRAMEBUFFER_VESA_MODE_10C |
| 190 | default 0x10D if FRAMEBUFFER_VESA_MODE_10D |
| 191 | default 0x10E if FRAMEBUFFER_VESA_MODE_10E |
| 192 | default 0x10F if FRAMEBUFFER_VESA_MODE_10F |
| 193 | default 0x110 if FRAMEBUFFER_VESA_MODE_110 |
| 194 | default 0x111 if FRAMEBUFFER_VESA_MODE_111 |
| 195 | default 0x112 if FRAMEBUFFER_VESA_MODE_112 |
| 196 | default 0x113 if FRAMEBUFFER_VESA_MODE_113 |
| 197 | default 0x114 if FRAMEBUFFER_VESA_MODE_114 |
| 198 | default 0x115 if FRAMEBUFFER_VESA_MODE_115 |
| 199 | default 0x116 if FRAMEBUFFER_VESA_MODE_116 |
| 200 | default 0x117 if FRAMEBUFFER_VESA_MODE_117 |
| 201 | default 0x118 if FRAMEBUFFER_VESA_MODE_118 |
| 202 | default 0x119 if FRAMEBUFFER_VESA_MODE_119 |
| 203 | default 0x11A if FRAMEBUFFER_VESA_MODE_11A |
| 204 | default 0x11B if FRAMEBUFFER_VESA_MODE_11B |
| 205 | default 0x117 if FRAMEBUFFER_VESA_MODE_USER |
| 206 | |
Hans de Goede | 66525bb | 2015-08-08 16:03:29 +0200 | [diff] [blame] | 207 | config VIDEO_LCD_ANX9804 |
| 208 | bool "ANX9804 bridge chip" |
| 209 | default n |
| 210 | ---help--- |
| 211 | Support for the ANX9804 bridge chip, which can take pixel data coming |
| 212 | from a parallel LCD interface and translate it on the fy into a DP |
| 213 | interface for driving eDP TFT displays. It uses I2C for configuration. |
| 214 | |
Siarhei Siamashka | b8329ac | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 215 | config VIDEO_LCD_SSD2828 |
| 216 | bool "SSD2828 bridge chip" |
| 217 | default n |
| 218 | ---help--- |
| 219 | Support for the SSD2828 bridge chip, which can take pixel data coming |
| 220 | from a parallel LCD interface and translate it on the fly into MIPI DSI |
| 221 | interface for driving a MIPI compatible LCD panel. It uses SPI for |
| 222 | configuration. |
| 223 | |
| 224 | config VIDEO_LCD_SSD2828_TX_CLK |
| 225 | int "SSD2828 TX_CLK frequency (in MHz)" |
| 226 | depends on VIDEO_LCD_SSD2828 |
Siarhei Siamashka | dddccd6 | 2015-01-19 05:23:35 +0200 | [diff] [blame] | 227 | default 0 |
Siarhei Siamashka | b8329ac | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 228 | ---help--- |
| 229 | The frequency of the crystal, which is clocking SSD2828. It may be |
| 230 | anything in the 8MHz-30MHz range and the exact value should be |
| 231 | retrieved from the board schematics. Or in the case of Allwinner |
| 232 | hardware, it can be usually found as 'lcd_xtal_freq' variable in |
Siarhei Siamashka | dddccd6 | 2015-01-19 05:23:35 +0200 | [diff] [blame] | 233 | FEX files. It can be also set to 0 for selecting PCLK from the |
| 234 | parallel LCD interface instead of TX_CLK as the PLL clock source. |
Siarhei Siamashka | b8329ac | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 235 | |
| 236 | config VIDEO_LCD_SSD2828_RESET |
| 237 | string "RESET pin of SSD2828" |
| 238 | depends on VIDEO_LCD_SSD2828 |
| 239 | default "" |
| 240 | ---help--- |
| 241 | The reset pin of SSD2828 chip. This takes a string in the format |
| 242 | understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H. |
| 243 | |
Hans de Goede | a5464f2 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 244 | config VIDEO_LCD_HITACHI_TX18D42VM |
| 245 | bool "Hitachi tx18d42vm LVDS LCD panel support" |
| 246 | depends on VIDEO |
| 247 | default n |
| 248 | ---help--- |
| 249 | Support for Hitachi tx18d42vm LVDS LCD panels, these panels have a |
| 250 | lcd controller which needs to be initialized over SPI, once that is |
| 251 | done they work like a regular LVDS panel. |
| 252 | |
Siarhei Siamashka | b8329ac | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 253 | config VIDEO_LCD_SPI_CS |
| 254 | string "SPI CS pin for LCD related config job" |
Hans de Goede | a5464f2 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 255 | depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM |
Siarhei Siamashka | b8329ac | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 256 | default "" |
| 257 | ---help--- |
| 258 | This is one of the SPI communication pins, involved in setting up a |
| 259 | working LCD configuration. The exact role of SPI may differ for |
| 260 | different hardware setups. The option takes a string in the format |
| 261 | understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H. |
| 262 | |
| 263 | config VIDEO_LCD_SPI_SCLK |
| 264 | string "SPI SCLK pin for LCD related config job" |
Hans de Goede | a5464f2 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 265 | depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM |
Siarhei Siamashka | b8329ac | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 266 | default "" |
| 267 | ---help--- |
| 268 | This is one of the SPI communication pins, involved in setting up a |
| 269 | working LCD configuration. The exact role of SPI may differ for |
| 270 | different hardware setups. The option takes a string in the format |
| 271 | understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H. |
| 272 | |
| 273 | config VIDEO_LCD_SPI_MOSI |
| 274 | string "SPI MOSI pin for LCD related config job" |
Hans de Goede | a5464f2 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 275 | depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM |
Siarhei Siamashka | b8329ac | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 276 | default "" |
| 277 | ---help--- |
| 278 | This is one of the SPI communication pins, involved in setting up a |
| 279 | working LCD configuration. The exact role of SPI may differ for |
| 280 | different hardware setups. The option takes a string in the format |
| 281 | understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H. |
| 282 | |
| 283 | config VIDEO_LCD_SPI_MISO |
| 284 | string "SPI MISO pin for LCD related config job (optional)" |
| 285 | depends on VIDEO_LCD_SSD2828 |
| 286 | default "" |
| 287 | ---help--- |
| 288 | This is one of the SPI communication pins, involved in setting up a |
| 289 | working LCD configuration. The exact role of SPI may differ for |
| 290 | different hardware setups. If wired up, this pin may provide additional |
| 291 | useful functionality. Such as bi-directional communication with the |
| 292 | hardware and LCD panel id retrieval (if the panel can report it). The |
| 293 | option takes a string in the format understood by 'name_to_gpio' |
| 294 | function, e.g. PH1 for pin 1 of port H. |
Simon Glass | 51f2c99 | 2015-04-14 21:03:38 -0600 | [diff] [blame] | 295 | |
Stefan Roese | 913d1be | 2016-01-20 08:13:28 +0100 | [diff] [blame] | 296 | config VIDEO_MVEBU |
| 297 | bool "Armada XP LCD controller" |
| 298 | default n |
| 299 | ---help--- |
| 300 | Support for the LCD controller integrated in the Marvell |
| 301 | Armada XP SoC. |
| 302 | |
Simon Glass | 2dcf143 | 2016-01-21 19:45:00 -0700 | [diff] [blame] | 303 | config DISPLAY |
| 304 | bool "Enable Display support" |
| 305 | depends on DM |
| 306 | default y |
Simon Glass | 51f2c99 | 2015-04-14 21:03:38 -0600 | [diff] [blame] | 307 | help |
Simon Glass | 2dcf143 | 2016-01-21 19:45:00 -0700 | [diff] [blame] | 308 | This supports drivers that provide a display, such as eDP (Embedded |
| 309 | DisplayPort) and HDMI (High Definition Multimedia Interface). |
| 310 | The devices provide a simple interface to start up the display, |
| 311 | read display information and enable it. |
Simon Glass | e7e8823 | 2015-04-14 21:03:42 -0600 | [diff] [blame] | 312 | |
Simon Glass | c253948 | 2016-01-21 19:45:03 -0700 | [diff] [blame] | 313 | config VIDEO_ROCKCHIP |
| 314 | bool "Enable Rockchip video support" |
| 315 | depends on DM_VIDEO |
| 316 | help |
| 317 | Rockchip SoCs provide video output capabilities for High-Definition |
| 318 | Multimedia Interface (HDMI), Low-voltage Differential Signalling |
| 319 | (LVDS), embedded DisplayPort (eDP) and Display Serial Interface |
| 320 | (DSI). This driver supports the on-chip video output device, and |
| 321 | targets the Rockchip RK3288. |
| 322 | |
Simon Glass | 1e69ad0 | 2016-01-18 19:52:24 -0700 | [diff] [blame] | 323 | config VIDEO_SANDBOX_SDL |
| 324 | bool "Enable sandbox video console using SDL" |
| 325 | depends on SANDBOX |
| 326 | help |
| 327 | When using sandbox you can enable an emulated LCD display which |
| 328 | appears as an SDL (Simple DirectMedia Layer) window. This is a |
| 329 | console device and can display stdout output. Within U-Boot is is |
| 330 | a normal bitmap display and can display images as well as text. |
| 331 | |
Simon Glass | e7e8823 | 2015-04-14 21:03:42 -0600 | [diff] [blame] | 332 | config VIDEO_TEGRA124 |
| 333 | bool "Enable video support on Tegra124" |
| 334 | help |
| 335 | Tegra124 supports many video output options including eDP and |
| 336 | HDMI. At present only eDP is supported by U-Boot. This option |
| 337 | enables this support which can be used on devices which |
| 338 | have an eDP display connected. |
Simon Glass | 801ab9e | 2015-07-02 18:16:08 -0600 | [diff] [blame] | 339 | |
| 340 | source "drivers/video/bridge/Kconfig" |
Masahiro Yamada | 0b11dbf | 2015-07-26 02:46:26 +0900 | [diff] [blame] | 341 | |
| 342 | endmenu |