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Kyle Moffett01baa052011-02-23 06:40:38 +00001/*
2 * This code was copied from arch/powerpc/kernel/misc_32.S in the Linux
3 * kernel sources (commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, also
4 * known as 2.6.38-rc5). The source file copyrights are as follows:
5 *
6 * (C) Copyright 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 *
8 * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
9 * and Paul Mackerras.
10 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020011 * SPDX-License-Identifier: GPL-2.0+
Kyle Moffett01baa052011-02-23 06:40:38 +000012 */
13
14#include <ppc_asm.tmpl>
15#include <ppc_defs.h>
16#include <config.h>
17
18/*
19 * Extended precision shifts.
20 *
21 * Updated to be valid for shift counts from 0 to 63 inclusive.
22 * -- Gabriel
23 *
24 * R3/R4 has 64 bit value
25 * R5 has shift count
26 * result in R3/R4
27 *
28 * ashrdi3: arithmetic right shift (sign propagation)
29 * lshrdi3: logical right shift
30 * ashldi3: left shift
31 */
32 .globl __ashrdi3
33__ashrdi3:
34 subfic r6,r5,32
35 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
36 addi r7,r5,32 # could be xori, or addi with -32
37 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
38 rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
39 sraw r7,r3,r7 # t2 = MSW >> (count-32)
40 or r4,r4,r6 # LSW |= t1
41 slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
42 sraw r3,r3,r5 # MSW = MSW >> count
43 or r4,r4,r7 # LSW |= t2
44 blr