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trembcc05c72013-09-10 22:08:39 +02001/*
2 *
3 * Configuration settings for the Armadeus Project motherboard APF27
4 *
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
trembcc05c72013-09-10 22:08:39 +020013#define CONFIG_ENV_VERSION 10
trembcc05c72013-09-10 22:08:39 +020014#define CONFIG_BOARD_NAME apf27
15
16/*
17 * SoC configurations
18 */
Masahiro Yamada5d7b1312014-11-06 14:59:36 +090019#define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
trembcc05c72013-09-10 22:08:39 +020020#define CONFIG_MACH_TYPE 1698 /* APF27 */
trembcc05c72013-09-10 22:08:39 +020021
22/*
23 * Enable the call to miscellaneous platform dependent initialization.
24 */
trembcc05c72013-09-10 22:08:39 +020025
26/*
trembcc05c72013-09-10 22:08:39 +020027 * SPL
28 */
trembcc05c72013-09-10 22:08:39 +020029#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
30#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
31#define CONFIG_SPL_MAX_SIZE 2048
32#define CONFIG_SPL_TEXT_BASE 0xA0000000
33
34/* NAND boot config */
trembcc05c72013-09-10 22:08:39 +020035#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
36#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
37#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
38#define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
39
40/*
41 * BOOTP options
42 */
43#define CONFIG_BOOTP_SUBNETMASK
44#define CONFIG_BOOTP_GATEWAY
45#define CONFIG_BOOTP_HOSTNAME
46#define CONFIG_BOOTP_BOOTPATH
47#define CONFIG_BOOTP_BOOTFILESIZE
48#define CONFIG_BOOTP_DNS
49#define CONFIG_BOOTP_DNS2
50
51#define CONFIG_HOSTNAME CONFIG_BOARD_NAME
52#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
53
54/*
55 * U-Boot Commands
56 */
trembcc05c72013-09-10 22:08:39 +020057#define CONFIG_CMD_BSP /* Board Specific functions */
trembcc05c72013-09-10 22:08:39 +020058#define CONFIG_CMD_DATE
trembcc05c72013-09-10 22:08:39 +020059#define CONFIG_CMD_EEPROM
trembcc05c72013-09-10 22:08:39 +020060#define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
trembcc05c72013-09-10 22:08:39 +020061#define CONFIG_CMD_MTDPARTS /* MTD partition support */
62#define CONFIG_CMD_NAND /* NAND support */
63#define CONFIG_CMD_NAND_LOCK_UNLOCK
64#define CONFIG_CMD_NAND_TRIMFFS
trembcc05c72013-09-10 22:08:39 +020065#define CONFIG_CMD_UBIFS
66
67/*
68 * Memory configurations
69 */
70#define CONFIG_NR_DRAM_POPULATED 1
71#define CONFIG_NR_DRAM_BANKS 2
72
73#define ACFG_SDRAM_MBYTE_SYZE 64
74
75#define PHYS_SDRAM_1 0xA0000000
76#define PHYS_SDRAM_2 0xB0000000
77#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
78#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
79#define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
80#define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
81
82#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
83 + PHYS_SDRAM_1_SIZE - 0x0100000)
84
85#define CONFIG_SYS_TEXT_BASE 0xA0000800
86
87/*
88 * FLASH organization
89 */
90#define ACFG_MONITOR_OFFSET 0x00000000
91#define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
92#define CONFIG_ENV_IS_IN_NAND
93#define CONFIG_ENV_OVERWRITE
94#define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
95#define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
96#define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
97#define CONFIG_ENV_OFFSET_REDUND \
98 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
99#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
100#define CONFIG_FIRMWARE_OFFSET 0x00200000
101#define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
102#define CONFIG_KERNEL_OFFSET 0x00300000
103#define CONFIG_ROOTFS_OFFSET 0x00800000
104
105#define CONFIG_MTDMAP "mxc_nand.0"
106#define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
107#define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
108 ":1M(u-boot)ro," \
109 "512K(env)," \
110 "512K(env2)," \
111 "512K(firmware)," \
112 "512K(dtb)," \
113 "5M(kernel)," \
114 "-(rootfs)"
115
116/*
117 * U-Boot general configurations
118 */
119#define CONFIG_SYS_LONGHELP
trembcc05c72013-09-10 22:08:39 +0200120#define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
121#define CONFIG_SYS_PBSIZE \
122 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
123 /* Print buffer size */
124#define CONFIG_SYS_MAXARGS 16 /* max command args */
125#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
126 /* Boot argument buffer size */
127#define CONFIG_AUTO_COMPLETE
128#define CONFIG_CMDLINE_EDITING
trembcc05c72013-09-10 22:08:39 +0200129#define CONFIG_ENV_VARS_UBOOT_CONFIG
130#define CONFIG_PREBOOT "run check_flash check_env;"
131
trembcc05c72013-09-10 22:08:39 +0200132/*
133 * Boot Linux
134 */
135#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
136#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
137#define CONFIG_INITRD_TAG /* send initrd params */
138
trembcc05c72013-09-10 22:08:39 +0200139#define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
140#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
141 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
142 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
143
144#define ACFG_CONSOLE_DEV ttySMX0
145#define CONFIG_BOOTCOMMAND "run ubifsboot"
146#define CONFIG_SYS_AUTOLOAD "no"
147/*
148 * Default load address for user programs and kernel
149 */
150#define CONFIG_LOADADDR 0xA0000000
151#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
152
153/*
154 * Extra Environments
155 */
156#define CONFIG_EXTRA_ENV_SETTINGS \
157 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
158 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
159 "mtdparts=" MTDPARTS_DEFAULT "\0" \
160 "partition=nand0,6\0" \
161 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
162 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
163 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
164 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
165 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
166 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
167 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
168 "kernel_addr_r=A0000000\0" \
169 "check_env=if test -n ${flash_env_version}; " \
170 "then env default env_version; " \
171 "else env set flash_env_version ${env_version}; env save; "\
172 "fi; " \
173 "if itest ${flash_env_version} < ${env_version}; then " \
174 "echo \"*** Warning - Environment version" \
175 " change suggests: run flash_reset_env; reset\"; "\
176 "env default flash_reset_env; "\
177 "fi; \0" \
178 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
179 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
180 "echo Flash environment variables erased!\0" \
181 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
182 "-u-boot-with-spl.bin\0" \
183 "flash_uboot=nand unlock ${u-boot_addr} ;" \
184 "nand erase.part u-boot;" \
185 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
186 "then nand lock; nand unlock ${env_addr};" \
187 "echo Flashing of uboot succeed;" \
188 "else echo Flashing of uboot failed;" \
189 "fi; \0" \
190 "update_uboot=run download_uboot flash_uboot\0" \
191 "download_env=tftpboot ${loadaddr} ${board_name}" \
192 "-u-boot-env.txt\0" \
193 "flash_env=env import -t ${loadaddr}; env save; \0" \
194 "update_env=run download_env flash_env\0" \
195 "update_all=run update_env update_uboot\0" \
196 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
197
198/*
199 * Serial Driver
200 */
201#define CONFIG_MXC_UART
202#define CONFIG_CONS_INDEX 1
trembcc05c72013-09-10 22:08:39 +0200203#define CONFIG_MXC_UART_BASE UART1_BASE
204
205/*
206 * GPIO
207 */
208#define CONFIG_MXC_GPIO
209
210/*
211 * NOR
212 */
213
214/*
215 * NAND
216 */
217#define CONFIG_NAND_MXC
218
219#define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
220#define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
221#define CONFIG_SYS_MAX_NAND_DEVICE 1
222
223#define CONFIG_MXC_NAND_HWECC
224#define CONFIG_SYS_NAND_LARGEPAGE
225#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
226#define CONFIG_SYS_NAND_PAGE_SIZE 2048
227#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
228#define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
229 CONFIG_SYS_NAND_PAGE_SIZE
230#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
231#define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
232#define NAND_MAX_CHIPS 1
233
234#define CONFIG_FLASH_SHOW_PROGRESS 45
235#define CONFIG_SYS_NAND_QUIET 1
236
237/*
238 * Partitions & Filsystems
239 */
240#define CONFIG_MTD_DEVICE
241#define CONFIG_MTD_PARTITIONS
trembcc05c72013-09-10 22:08:39 +0200242#define CONFIG_SUPPORT_VFAT
243
244/*
245 * UBIFS
246 */
247#define CONFIG_RBTREE
248#define CONFIG_LZO
249
250/*
251 * Ethernet (on SOC imx FEC)
252 */
253#define CONFIG_FEC_MXC
254#define CONFIG_FEC_MXC_PHYADDR 0x1f
255#define CONFIG_MII /* MII PHY management */
256
257/*
tremb5e7f1b2013-09-10 22:08:40 +0200258 * FPGA
259 */
260#ifndef CONFIG_SPL_BUILD
261#define CONFIG_FPGA
262#endif
263#define CONFIG_FPGA_COUNT 1
264#define CONFIG_FPGA_XILINX
265#define CONFIG_FPGA_SPARTAN3
266#define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
267#define CONFIG_SYS_FPGA_PROG_FEEDBACK
268#define CONFIG_SYS_FPGA_CHECK_CTRLC
269#define CONFIG_SYS_FPGA_CHECK_ERROR
270
271/*
trembcc05c72013-09-10 22:08:39 +0200272 * Fuses - IIM
273 */
274#ifdef CONFIG_CMD_IMX_FUSE
275#define IIM_MAC_BANK 0
276#define IIM_MAC_ROW 5
277#define IIM0_SCC_KEY 11
278#define IIM1_SUID 1
279#endif
280
281/*
282 * I2C
283 */
284
285#ifdef CONFIG_CMD_I2C
tremb089d032013-09-21 18:13:36 +0200286#define CONFIG_SYS_I2C
287#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +0200288#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
289#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
tremb089d032013-09-21 18:13:36 +0200290#define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
291#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
292#define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
293#define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
trembcc05c72013-09-10 22:08:39 +0200294#define CONFIG_SYS_I2C_NOPROBES { }
295
296#ifdef CONFIG_CMD_EEPROM
297# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
298# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
299#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
300#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
301#endif /* CONFIG_CMD_EEPROM */
302#endif /* CONFIG_CMD_I2C */
303
304/*
305 * SD/MMC
306 */
307#ifdef CONFIG_CMD_MMC
trembcc05c72013-09-10 22:08:39 +0200308#define CONFIG_MXC_MCI_REGS_BASE 0x10014000
309#endif
310
311/*
312 * RTC
313 */
314#ifdef CONFIG_CMD_DATE
315#define CONFIG_RTC_DS1374
316#define CONFIG_SYS_RTC_BUS_NUM 0
317#endif /* CONFIG_CMD_DATE */
318
319/*
trembcc05c72013-09-10 22:08:39 +0200320 * PLL
321 *
322 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
323 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
324 */
325#define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
326
327#if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
328/* micron 64MB */
329#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
330#define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
331#endif
332
333#if (ACFG_SDRAM_MBYTE_SYZE == 128)
334/* micron 128MB */
335#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
336#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
337#endif
338
339#if (ACFG_SDRAM_MBYTE_SYZE == 256)
340/* micron 256MB */
341#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
342#define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
343#endif
344
345#endif /* __CONFIG_H */