| Haiying Wang | 765547d | 2009-03-27 17:02:45 -0400 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved. |
| 3 | * |
| 4 | * See file CREDITS for list of people who contributed to this |
| 5 | * project. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; either version 2 of |
| 10 | * the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 20 | * MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | #ifndef __BCSR_H_ |
| 24 | #define __BCSR_H_ |
| 25 | |
| 26 | #include <common.h> |
| 27 | |
| 28 | /* BCSR Bit definitions*/ |
| 29 | /****************************************/ |
| 30 | /* BCSR defines */ |
| 31 | /****************************************/ |
| 32 | #define BCSR6_UPC1_EN 0x80 |
| 33 | #define BCSR6_UPC1_POS_EN 0x40 |
| 34 | #define BCSR6_UPC1_ADDR_EN 0x20 |
| 35 | #define BCSR6_UPC1_DEV2 0x10 |
| 36 | #define BCSR6_SD_ENABLE 0x04 |
| 37 | #define BCSR6_TDM2G_EN 0x02 |
| 38 | #define BCSR6_UCC7_RMII_EN 0x01 |
| 39 | |
| 40 | #define BCSR7_UCC1_GETH_EN 0x80 |
| 41 | #define BCSR7_UCC1_RGMII_EN 0x40 |
| 42 | #define BCSR7_UCC1_RTBI_EN 0x20 |
| 43 | #define BCSR7_GETHRST_MRVL 0x04 |
| 44 | #define BCSR7_BRD_WRT_PROTECT 0x02 |
| 45 | |
| 46 | #define BCSR8_UCC2_GETH_EN 0x80 |
| 47 | #define BCSR8_UCC2_RGMII_EN 0x40 |
| 48 | #define BCSR8_UCC2_RTBI_EN 0x20 |
| 49 | #define BCSR8_UEM_MARVEL_RESET 0x02 |
| 50 | |
| 51 | #define BCSR9_UCC3_GETH_EN 0x80 |
| 52 | #define BCSR9_UCC3_RGMII_EN 0x40 |
| 53 | #define BCSR9_UCC3_RTBI_EN 0x20 |
| 54 | #define BCSR9_UCC3_RMII_EN 0x10 |
| 55 | #define BCSR9_UCC3_UEM_MICREL 0x01 |
| 56 | |
| 57 | #define BCSR10_UCC4_GETH_EN 0x80 |
| 58 | #define BCSR10_UCC4_RGMII_EN 0x40 |
| 59 | #define BCSR10_UCC4_RTBI_EN 0x20 |
| 60 | |
| 61 | #define BCSR11_LED0 0x40 |
| 62 | #define BCSR11_LED1 0x20 |
| 63 | #define BCSR11_LED2 0x10 |
| 64 | |
| 65 | #define BCSR12_UCC6_RMII_EN 0x20 |
| 66 | #define BCSR12_UCC8_RMII_EN 0x20 |
| 67 | |
| 68 | #define BCSR15_SMII6_DIS 0x08 |
| 69 | #define BCSR15_SMII8_DIS 0x04 |
| 70 | |
| 71 | #define BCSR16_UPC1_DEV2 0x02 |
| 72 | |
| 73 | #define BCSR17_FLASH_nWP 0x01 |
| 74 | |
| 75 | /*BCSR Utils functions*/ |
| 76 | |
| 77 | void enable_8569mds_flash_write(void); |
| 78 | void disable_8569mds_flash_write(void); |
| 79 | void enable_8569mds_qe_mdio(void); |
| 80 | void disable_8569mds_brd_eeprom_write_protect(void); |
| 81 | |
| 82 | #endif /* __BCSR_H_ */ |