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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Wenyou Yangcb0cb1b2018-02-09 11:34:50 +08002/*
3 * Copyright (C) 2018 Microhip / Atmel Corporation
4 * Wenyou.Yang <wenyou.yang@microchip.com>
Wenyou Yangcb0cb1b2018-02-09 11:34:50 +08005 */
6
7#include <common.h>
8#include <clk-uclass.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -06009#include <log.h>
Wenyou Yangcb0cb1b2018-02-09 11:34:50 +080010#include <dm/device.h>
Simon Glass61b29b82020-02-03 07:36:15 -070011#include <linux/err.h>
Wenyou Yangcb0cb1b2018-02-09 11:34:50 +080012#include <linux/io.h>
13#include <mach/at91_pmc.h>
14#include "pmc.h"
15
16DECLARE_GLOBAL_DATA_PTR;
17
18#define AT91_USB_CLK_SOURCE_MAX 2
19#define AT91_USB_CLK_MAX_DIV 15
20
21struct at91_usb_clk_priv {
22 u32 num_clksource;
23};
24
25static ulong at91_usb_clk_get_rate(struct clk *clk)
26{
27 struct pmc_platdata *plat = dev_get_platdata(clk->dev);
28 struct at91_pmc *pmc = plat->reg_base;
29 struct clk source;
30 u32 tmp, usbdiv;
31 u8 source_index;
32 int ret;
33
34 tmp = readl(&pmc->pcr);
35 source_index = (tmp >> AT91_PMC_USB_USBS_OFFSET) &
36 AT91_PMC_USB_USBS_MASK;
37 usbdiv = (tmp >> AT91_PMC_USB_DIV_OFFSET) & AT91_PMC_USB_DIV_MASK;
38
39 ret = clk_get_by_index(clk->dev, source_index, &source);
40 if (ret)
41 return 0;
42
43 return clk_get_rate(&source) / (usbdiv + 1);
44}
45
46static ulong at91_usb_clk_set_rate(struct clk *clk, ulong rate)
47{
48 struct pmc_platdata *plat = dev_get_platdata(clk->dev);
49 struct at91_pmc *pmc = plat->reg_base;
50 struct at91_usb_clk_priv *priv = dev_get_priv(clk->dev);
51 struct clk source, best_source;
52 ulong tmp_rate, best_rate = rate, source_rate;
53 int tmp_diff, best_diff = -1;
54 u32 div, best_div = 0;
55 u8 best_source_index = 0;
56 u8 i;
57 u32 tmp;
58 int ret;
59
60 for (i = 0; i < priv->num_clksource; i++) {
61 ret = clk_get_by_index(clk->dev, i, &source);
62 if (ret)
63 return ret;
64
65 source_rate = clk_get_rate(&source);
66 if (IS_ERR_VALUE(source_rate))
67 return source_rate;
68
69 for (div = 1; div < AT91_USB_CLK_MAX_DIV + 2; div++) {
70 tmp_rate = DIV_ROUND_CLOSEST(source_rate, div);
71 tmp_diff = abs(rate - tmp_rate);
72
73 if (best_diff < 0 || best_diff > tmp_diff) {
74 best_rate = tmp_rate;
75 best_diff = tmp_diff;
76
77 best_div = div - 1;
78 best_source = source;
79 best_source_index = i;
80 }
81
82 if (!best_diff || tmp_rate < rate)
83 break;
84 }
85
86 if (!best_diff)
87 break;
88 }
89
90 debug("AT91 USB: best sourc: %s, best_rate = %ld, best_div = %d\n",
91 best_source.dev->name, best_rate, best_div);
92
93 ret = clk_enable(&best_source);
94 if (ret)
95 return ret;
96
97 tmp = AT91_PMC_USB_USBS_(best_source_index) |
98 AT91_PMC_USB_DIV_(best_div);
99 writel(tmp, &pmc->usb);
100
101 return 0;
102}
103
104static struct clk_ops at91_usb_clk_ops = {
105 .get_rate = at91_usb_clk_get_rate,
106 .set_rate = at91_usb_clk_set_rate,
107};
108
109static int at91_usb_clk_ofdata_to_platdata(struct udevice *dev)
110{
111 struct at91_usb_clk_priv *priv = dev_get_priv(dev);
112 u32 cells[AT91_USB_CLK_SOURCE_MAX];
113 u32 num_clksource;
114
115 num_clksource = fdtdec_get_int_array_count(gd->fdt_blob,
116 dev_of_offset(dev),
117 "clocks", cells,
118 AT91_USB_CLK_SOURCE_MAX);
119
120 if (!num_clksource)
121 return -1;
122
123 priv->num_clksource = num_clksource;
124
125 return 0;
126}
127
128static int at91_usb_clk_probe(struct udevice *dev)
129{
130 return at91_pmc_core_probe(dev);
131}
132
133static const struct udevice_id at91_usb_clk_match[] = {
134 { .compatible = "atmel,at91sam9x5-clk-usb" },
135 {}
136};
137
138U_BOOT_DRIVER(at91_usb_clk) = {
139 .name = "at91-usb-clk",
140 .id = UCLASS_CLK,
141 .of_match = at91_usb_clk_match,
142 .probe = at91_usb_clk_probe,
143 .ofdata_to_platdata = at91_usb_clk_ofdata_to_platdata,
144 .priv_auto_alloc_size = sizeof(struct at91_usb_clk_priv),
145 .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
146 .ops = &at91_usb_clk_ops,
147};