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Heiko Schocher0f8bc282013-12-02 07:47:22 +01001/*
2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
3 * (C) Copyright 2013 Siemens AG
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9260ek.h
7 *
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
18/*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22#include <asm/hardware.h>
Heiko Schocher40540822015-08-21 18:53:46 +020023#include <linux/sizes.h>
Heiko Schocher0f8bc282013-12-02 07:47:22 +010024
Heiko Schocherd0b37232014-10-01 07:26:06 +020025
Heiko Schocher389aee82014-11-18 09:41:57 +010026#if defined(CONFIG_SPL_BUILD)
27#define CONFIG_SYS_THUMB_BUILD
28#define CONFIG_SYS_ICACHE_OFF
29#define CONFIG_SYS_DCACHE_OFF
30#endif
Heiko Schocher0f8bc282013-12-02 07:47:22 +010031/*
32 * Warning: changing CONFIG_SYS_TEXT_BASE requires
33 * adapting the initial boot program.
34 * Since the linker has to swallow that define, we must use a pure
35 * hex number here!
36 */
37
38
Heiko Schocher237e3792014-10-31 08:31:05 +010039#define CONFIG_SYS_TEXT_BASE 0x21000000
Heiko Schocher0f8bc282013-12-02 07:47:22 +010040
41/* ARM asynchronous clock */
42#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
43#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
Heiko Schocher0f8bc282013-12-02 07:47:22 +010044
45/* Misc CPU related */
46#define CONFIG_ARCH_CPU_INIT
47#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48#define CONFIG_SETUP_MEMORY_TAGS
49#define CONFIG_INITRD_TAG
50#define CONFIG_SKIP_LOWLEVEL_INIT
51#define CONFIG_BOARD_EARLY_INIT_F
52#define CONFIG_DISPLAY_CPUINFO
53
54#define CONFIG_CMD_BOOTZ
55#define CONFIG_OF_LIBFDT
56
57/* general purpose I/O */
58#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
59#define CONFIG_AT91_GPIO
60#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
61
62/* serial console */
63#define CONFIG_ATMEL_USART
64#define CONFIG_USART_BASE ATMEL_BASE_DBGU
65#define CONFIG_USART_ID ATMEL_ID_SYS
66#define CONFIG_BAUDRATE 115200
67
68#define CONFIG_BOOTDELAY 3
69
70/*
71 * Command line configuration.
72 */
Heiko Schocher0f8bc282013-12-02 07:47:22 +010073#define CONFIG_CMD_PING
74#define CONFIG_CMD_DHCP
75#define CONFIG_CMD_NAND
76
77/*
78 * SDRAM: 1 bank, min 32, max 128 MB
79 * Initialized before u-boot gets started.
80 */
81#define CONFIG_NR_DRAM_BANKS 1
82#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
Heiko Schocher0ed366f2015-08-21 18:55:07 +020083#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
Heiko Schocher0f8bc282013-12-02 07:47:22 +010084
85/*
86 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
87 * leaving the correct space for initial global data structure above
88 * that address while providing maximum stack area below.
89 */
Heiko Schocher0ed366f2015-08-21 18:55:07 +020090#define CONFIG_SYS_INIT_SP_ADDR \
Heiko Schocher0f8bc282013-12-02 07:47:22 +010091 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
92
93/* NAND flash */
94#ifdef CONFIG_CMD_NAND
95#define CONFIG_NAND_ATMEL
96#define CONFIG_SYS_MAX_NAND_DEVICE 1
97#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
98#define CONFIG_SYS_NAND_DBW_8
99#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
100#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
101#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
102#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
103#endif
104
105/* NOR flash - no real flash on this board */
106#define CONFIG_SYS_NO_FLASH 1
107
108/* Ethernet */
109#define CONFIG_MACB
110#define CONFIG_RMII
111#define CONFIG_AT91_WANTS_COMMON_PHY
112
Heiko Schocherf6241622015-01-21 08:38:23 +0100113#define CONFIG_AT91SAM9_WATCHDOG
Heiko Schocher0ed366f2015-08-21 18:55:07 +0200114#define CONFIG_AT91_HW_WDT_TIMEOUT 15
Heiko Schocherf6241622015-01-21 08:38:23 +0100115#if !defined(CONFIG_SPL_BUILD)
116/* Enable the watchdog */
117#define CONFIG_HW_WATCHDOG
118#endif
119
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100120/* USB */
121#if defined(CONFIG_BOARD_TAURUS)
122#define CONFIG_USB_ATMEL
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200123#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100124#define CONFIG_USB_OHCI_NEW
125#define CONFIG_SYS_USB_OHCI_CPU_INIT
126#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
127#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
128#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
129#define CONFIG_USB_STORAGE
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200130
131/* USB DFU support */
132#define CONFIG_CMD_MTDPARTS
133#define CONFIG_MTD_DEVICE
134#define CONFIG_MTD_PARTITIONS
135
136#define CONFIG_USB_GADGET
137#define CONFIG_USB_GADGET_AT91
138
139/* DFU class support */
140#define CONFIG_CMD_USB
141#define CONFIG_CMD_DFU
142#define CONFIG_USB_FUNCTION_DFU
143#define CONFIG_DFU_NAND
144#define CONFIG_USB_GADGET_DOWNLOAD
145#define CONFIG_USB_GADGET_VBUS_DRAW 2
146#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
147#define DFU_MANIFEST_POLL_TIMEOUT 25000
148
149/* USB DFU IDs */
150#define CONFIG_G_DNL_VENDOR_NUM 0x0908
151#define CONFIG_G_DNL_PRODUCT_NUM 0x02d2
152#define CONFIG_G_DNL_MANUFACTURER "Siemens AG"
153
154#define CONFIG_SYS_CACHELINE_SIZE SZ_8K
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100155#endif
156
Heiko Schocher50921cd2014-10-31 08:30:56 +0100157/* SPI EEPROM */
158#define CONFIG_SPI
159#define CONFIG_CMD_SPI
160#define CONFIG_CMD_SF
Heiko Schocher50921cd2014-10-31 08:30:56 +0100161#define CONFIG_ATMEL_SPI
Heiko Schocher50921cd2014-10-31 08:30:56 +0100162#define TAURUS_SPI_MASK (1 << 4)
163#define TAURUS_SPI_CS_PIN AT91_PIN_PA3
164
Heiko Schochera1655bb2014-11-18 09:41:58 +0100165#if defined(CONFIG_SPL_BUILD)
166/* SPL related */
167#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
168#define CONFIG_SPL_SPI_SUPPORT
169#define CONFIG_SPL_SPI_FLASH_SUPPORT
170#define CONFIG_SPL_SPI_LOAD
171#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
172
173#define CONFIG_SF_DEFAULT_BUS 0
Heiko Schocher0ed366f2015-08-21 18:55:07 +0200174#define CONFIG_SF_DEFAULT_SPEED 1000000
175#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
Heiko Schochera1655bb2014-11-18 09:41:58 +0100176#endif
177
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100178/* load address */
179#define CONFIG_SYS_LOAD_ADDR 0x22000000
180
181/* bootstrap in spi flash , u-boot + env + linux in nandflash */
182#define CONFIG_ENV_IS_IN_NAND
183#define CONFIG_ENV_OFFSET 0x100000
184#define CONFIG_ENV_OFFSET_REDUND 0x180000
Heiko Schocher0ed366f2015-08-21 18:55:07 +0200185#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100186#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
Heiko Schocher40540822015-08-21 18:53:46 +0200187
188#if defined(CONFIG_BOARD_TAURUS)
189#define CONFIG_BOOTARGS_TAURUS \
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100190 "console=ttyS0,115200 earlyprintk " \
191 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
192 "256k(env),256k(env_redundant),256k(spare)," \
193 "512k(dtb),6M(kernel)ro,-(rootfs) " \
194 "root=/dev/mtdblock7 rw rootfstype=jffs2"
Heiko Schocher40540822015-08-21 18:53:46 +0200195#endif
196
197#if defined(CONFIG_BOARD_AXM)
198#define CONFIG_BOOTARGS_AXM \
199 "\0" \
200 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
201 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
202 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
203 "baudrate=115200\0" \
204 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
205 "boot_retries=0\0" \
206 "bootcmd=run flash_self\0" \
207 "bootdelay=3\0" \
208 "ethact=macb0\0" \
209 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
210 "bootm ${kernel_ram};reset\0" \
211 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
212 "bootm ${kernel_ram};reset\0" \
213 "flash_self_test=run nand_kernel;run setbootargs addtest; " \
214 "upgrade_available;bootm ${kernel_ram};reset\0" \
215 "hostname=systemone\0" \
216 "kernel_Off=0x00200000\0" \
217 "kernel_Off_fallback=0x03800000\0" \
218 "kernel_ram=0x21500000\0" \
219 "kernel_size=0x00400000\0" \
220 "kernel_size_fallback=0x00400000\0" \
221 "loads_echo=1\0" \
222 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
223 "${kernel_size}\0" \
224 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
225 "run nfsargs;run addip;upgrade_available;bootm " \
226 "${kernel_ram};reset\0" \
227 "netdev=eth0\0" \
228 "nfsargs=run root_path;setenv bootargs ${bootargs} " \
229 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
230 "at91sam9_wdt.wdt_timeout=16\0" \
231 "partitionset_active=A\0" \
232 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\
233 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
234 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
235 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
236 "project_dir=systemone\0" \
237 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
238 "rootfs=/dev/mtdblock5\0" \
239 "rootfs_fallback=/dev/mtdblock7\0" \
240 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
241 "root=${rootfs} rootfstype=jffs2 panic=7 " \
242 "at91sam9_wdt.wdt_timeout=16\0" \
243 "stderr=serial\0" \
244 "stdin=serial\0" \
245 "stdout=serial\0" \
246 "upgrade_available=0\0"
247#endif
248
249#if defined(CONFIG_BOARD_TAURUS)
250#define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
251#endif
252
253#if defined(CONFIG_BOARD_AXM)
254#define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
255#endif
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100256
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100257#define CONFIG_SYS_CBSIZE 256
258#define CONFIG_SYS_MAXARGS 16
259#define CONFIG_SYS_PBSIZE \
260 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
261#define CONFIG_SYS_LONGHELP
262#define CONFIG_CMDLINE_EDITING
263#define CONFIG_AUTO_COMPLETE
264
265/*
266 * Size of malloc() pool
267 */
268#define CONFIG_SYS_MALLOC_LEN \
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200269 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100270
Heiko Schocher237e3792014-10-31 08:31:05 +0100271/* Defines for SPL */
272#define CONFIG_SPL_FRAMEWORK
273#define CONFIG_SPL_TEXT_BASE 0x0
Heiko Schocher40540822015-08-21 18:53:46 +0200274#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
275#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
Heiko Schochera1655bb2014-11-18 09:41:58 +0100276#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
277 CONFIG_SYS_MALLOC_LEN)
278#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
Heiko Schocher237e3792014-10-31 08:31:05 +0100279
280#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
Heiko Schocher0ed366f2015-08-21 18:55:07 +0200281#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
Heiko Schocher237e3792014-10-31 08:31:05 +0100282
283#define CONFIG_SPL_LIBCOMMON_SUPPORT
284#define CONFIG_SPL_LIBGENERIC_SUPPORT
285#define CONFIG_SPL_SERIAL_SUPPORT
286
287#define CONFIG_SPL_BOARD_INIT
288#define CONFIG_SPL_GPIO_SUPPORT
289#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
290#define CONFIG_SPL_NAND_SUPPORT
291#define CONFIG_SYS_USE_NANDFLASH 1
292#define CONFIG_SPL_NAND_DRIVERS
293#define CONFIG_SPL_NAND_BASE
294#define CONFIG_SPL_NAND_ECC
295#define CONFIG_SPL_NAND_RAW_ONLY
296#define CONFIG_SPL_NAND_SOFTECC
297#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200298#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
Heiko Schocher237e3792014-10-31 08:31:05 +0100299#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
300#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
301#define CONFIG_SYS_NAND_5_ADDR_CYCLE
302
Heiko Schocher0ed366f2015-08-21 18:55:07 +0200303#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
304#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
305#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
Heiko Schocher237e3792014-10-31 08:31:05 +0100306#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
307 CONFIG_SYS_NAND_PAGE_SIZE)
308#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
309#define CONFIG_SYS_NAND_ECCSIZE 256
310#define CONFIG_SYS_NAND_ECCBYTES 3
311#define CONFIG_SYS_NAND_OOBSIZE 64
312#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
313 48, 49, 50, 51, 52, 53, 54, 55, \
314 56, 57, 58, 59, 60, 61, 62, 63, }
315
316
317#define CONFIG_SPL_ATMEL_SIZE
318#define CONFIG_SYS_MASTER_CLOCK 132096000
319#define AT91_PLL_LOCK_TIMEOUT 1000000
320#define CONFIG_SYS_AT91_PLLA 0x202A3F01
321#define CONFIG_SYS_MCKR 0x1300
322#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
323#define CONFIG_SYS_AT91_PLLB 0x10193F05
Heiko Schocher40540822015-08-21 18:53:46 +0200324
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100325#endif