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Dirk Eibach60083262017-02-22 16:07:23 +01001/*
2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3 * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef _CONFIG_CONTROLCENTERDC_H
9#define _CONFIG_CONTROLCENTERDC_H
10
11/*
12 * High Level Configuration Options (easy to change)
13 */
14#define CONFIG_CUSTOMER_BOARD_SUPPORT
15
16#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
17#define CONFIG_DISPLAY_BOARDINFO_LATE
18#define CONFIG_BOARD_LATE_INIT
19#define CONFIG_LAST_STAGE_INIT
Dirk Eibach60083262017-02-22 16:07:23 +010020
21/*
22 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
23 * for DDR ECC byte filling in the SPL before loading the main
24 * U-Boot into it.
25 */
26#define CONFIG_SYS_TEXT_BASE 0x00800000
27
28#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
29
30#define CONFIG_LOADADDR 1000000
31
32/*
33 * Commands configuration
34 */
Dirk Eibach60083262017-02-22 16:07:23 +010035#define CONFIG_CMD_I2C
36#define CONFIG_CMD_PCI
37#define CONFIG_CMD_SCSI
38#define CONFIG_CMD_SPI
39
40/* SPI NOR flash default params, used by sf commands */
41#define CONFIG_SF_DEFAULT_BUS 1
42#define CONFIG_SF_DEFAULT_SPEED 1000000
43#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
44
45/*
46 * SDIO/MMC Card Configuration
47 */
48#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
49
50/*
51 * SATA/SCSI/AHCI configuration
52 */
53#define CONFIG_LIBATA
Dirk Eibach60083262017-02-22 16:07:23 +010054#define CONFIG_SCSI_AHCI
55#define CONFIG_SCSI_AHCI_PLAT
56#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
57#define CONFIG_SYS_SCSI_MAX_LUN 1
58#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
59 CONFIG_SYS_SCSI_MAX_LUN)
60
61/* Additional FS support/configuration */
62#define CONFIG_SUPPORT_VFAT
63
64/* USB/EHCI configuration */
65#define CONFIG_EHCI_IS_TDI
66
67/* Environment in SPI NOR flash */
Dirk Eibach60083262017-02-22 16:07:23 +010068#define CONFIG_ENV_SPI_BUS 1
69#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
70#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
71#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
72
73#define CONFIG_PHY_MARVELL /* there is a marvell phy */
74#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
75
76/* PCIe support */
77#ifndef CONFIG_SPL_BUILD
78#define CONFIG_PCI
79#define CONFIG_PCI_MVEBU
80#define CONFIG_PCI_PNP
81#define CONFIG_PCI_SCAN_SHOW
82#endif
83
84#define CONFIG_SYS_ALT_MEMTEST
85
86/*
87 * Software (bit-bang) MII driver configuration
88 */
89#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
90#define CONFIG_BITBANGMII_MULTI
91
92/* SPL */
93/*
94 * Select the boot device here
95 *
96 * Currently supported are:
97 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
98 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
99 */
100#define SPL_BOOT_SPI_NOR_FLASH 1
101#define SPL_BOOT_SDIO_MMC_CARD 2
102#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
103
104/* Defines for SPL */
105#define CONFIG_SPL_FRAMEWORK
106#define CONFIG_SPL_SIZE (160 << 10)
107
108#if defined(CONFIG_SECURED_MODE_IMAGE)
109#define CONFIG_SPL_TEXT_BASE 0x40002614
110#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
111#else
112#define CONFIG_SPL_TEXT_BASE 0x40000030
113#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
114#endif
115
116#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
117#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
118
119#ifdef CONFIG_SPL_BUILD
120#define CONFIG_SYS_MALLOC_SIMPLE
121#endif
122
123#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
124#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
125
126#define CONFIG_SPL_LIBCOMMON_SUPPORT
127#define CONFIG_SPL_LIBGENERIC_SUPPORT
128#define CONFIG_SPL_SERIAL_SUPPORT
129#define CONFIG_SPL_I2C_SUPPORT
130
131#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
132/* SPL related SPI defines */
133#define CONFIG_SPL_SPI_LOAD
134#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000
135#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
136#endif
137
138#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
139/* SPL related MMC defines */
140#define CONFIG_SPL_MMC_SUPPORT
141#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
142#define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
143#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
144#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
145#ifdef CONFIG_SPL_BUILD
146#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
147#endif
148#endif
149
150/*
151 * Environment Configuration
152 */
153#define CONFIG_ENV_OVERWRITE
154
155#define CONFIG_BAUDRATE 115200
156
157#define CONFIG_HOSTNAME ccdc
158#define CONFIG_ROOTPATH "/opt/nfsroot"
159#define CONFIG_BOOTFILE "ccdc.img"
160
161#define CONFIG_PREBOOT /* enable preboot variable */
162
163#define CONFIG_EXTRA_ENV_SETTINGS \
164 "netdev=eth1\0" \
165 "consoledev=ttyS1\0" \
166 "u-boot=u-boot.bin\0" \
167 "bootfile_addr=1000000\0" \
168 "keyprogram_addr=3000000\0" \
169 "keyprogram_file=keyprogram.img\0" \
170 "fdtfile=controlcenterdc.dtb\0" \
171 "load=tftpboot ${loadaddr} ${u-boot}\0" \
172 "mmcdev=0:2\0" \
173 "update=sf probe 1:0;" \
174 " sf erase 0 +${filesize};" \
175 " sf write ${fileaddr} 0 ${filesize}\0" \
176 "upd=run load update\0" \
177 "fdt_high=0x10000000\0" \
178 "initrd_high=0x10000000\0" \
179 "loadkeyprogram=tpm flush_keys;" \
180 " mmc rescan;" \
181 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
182 " source ${keyprogram_addr}:script@1\0" \
183 "gpio1=gpio@22_25\0" \
184 "gpio2=A29\0" \
185 "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
186 "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
187 "bootfail=for i in ${blinkseq}; do" \
188 " if test $i -eq 0; then" \
189 " gpio clear ${gpio1}; gpio set ${gpio2};" \
190 " elif test $i -eq 1; then" \
191 " gpio clear ${gpio1}; gpio clear ${gpio2};" \
192 " elif test $i -eq 2; then" \
193 " gpio set ${gpio1}; gpio set ${gpio2};" \
194 " else;" \
195 " gpio clear ${gpio1}; gpio set ${gpio2};" \
196 " fi; sleep 0.12; done\0"
197
198#define CONFIG_NFSBOOTCOMMAND \
199 "setenv bootargs root=/dev/nfs rw " \
200 "nfsroot=${serverip}:${rootpath} " \
201 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
202 "console=${consoledev},${baudrate} ${othbootargs}; " \
203 "tftpboot ${bootfile_addr} ${bootfile}; " \
204 "bootm ${bootfile_addr}"
205
206#define CONFIG_MMCBOOTCOMMAND \
207 "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
208 "console=${consoledev},${baudrate} ${othbootargs}; " \
209 "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
210 "bootm ${bootfile_addr}"
211
212#define CONFIG_BOOTCOMMAND \
213 "if env exists keyprogram; then;" \
214 " setenv keyprogram; run nfsboot;" \
215 " fi;" \
216 " run dobootfail"
217
218/*
219 * mv-common.h should be defined after CMD configs since it used them
220 * to enable certain macros
221 */
222#include "mv-common.h"
223
224#endif /* _CONFIG_CONTROLCENTERDC_H */