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Mike Frysinger9417d9a2008-10-12 21:49:28 -04001/*
2 * U-boot - Configuration file for TCM-BF537 board
3 */
4
5#ifndef __CONFIG_TCM_BF537_H__
6#define __CONFIG_TCM_BF537_H__
7
Mike Frysingerf348ab82009-04-24 17:22:40 -04008#include <asm/config-pre.h>
Mike Frysinger9417d9a2008-10-12 21:49:28 -04009
10
11/*
12 * Processor Settings
13 */
14#define CONFIG_BFIN_CPU bf537-0.2
15#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
16
17
18/*
19 * Clock Settings
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 */
23/* CONFIG_CLKIN_HZ is any value in Hz */
24#define CONFIG_CLKIN_HZ 25000000
25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26/* 1 = CLKIN / 2 */
27#define CONFIG_CLKIN_HALF 0
28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29/* 1 = bypass PLL */
30#define CONFIG_PLL_BYPASS 0
31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32/* Values can range from 0-63 (where 0 means 64) */
33#define CONFIG_VCO_MULT 21
34/* CCLK_DIV controls the core clock divider */
35/* Values can be 1, 2, 4, or 8 ONLY */
36#define CONFIG_CCLK_DIV 1
37/* SCLK_DIV controls the system clock divider */
38/* Values can range from 1-15 */
39#define CONFIG_SCLK_DIV 4
40
41
42/*
43 * Memory Settings
44 */
45#define CONFIG_MEM_ADD_WDTH 9
46#define CONFIG_MEM_SIZE 32
47
48#define CONFIG_EBIU_SDRRC_VAL 0x3f8
49#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
50
51#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
52#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
53#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
54
55#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
56#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
57
58
59/*
60 * Network Settings
61 */
62/* TCM-BF537E has no PHY on it, but EXT-BF5xx-USB/Ethernet board has */
63#ifndef __ADSPBF534__
64#define ADI_CMDS_NETWORK 1
65#define CONFIG_BFIN_MAC
66#define CONFIG_NETCONSOLE 1
67#define CONFIG_NET_MULTI 1
68#endif
69#define CONFIG_HOSTNAME tcm-bf537
70/* Uncomment next line to use fixed MAC address */
71/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
72
73
74/*
75 * Flash Settings
76 */
77#define CONFIG_FLASH_CFI_DRIVER
78#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
79#define CONFIG_SYS_FLASH_BASE 0x20000000
80#define CONFIG_SYS_FLASH_CFI
81#define CONFIG_SYS_FLASH_PROTECTION
82#define CONFIG_SYS_MAX_FLASH_BANKS 1
83#define CONFIG_SYS_MAX_FLASH_SECT 67
84
85
86/*
87 * Env Storage Settings
88 */
89#define CONFIG_ENV_IS_IN_FLASH 1
90#define CONFIG_ENV_OFFSET 0x4000
91#define CONFIG_ENV_SIZE 0x2000
92#define CONFIG_ENV_SECT_SIZE 0x20000
93#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
94#define ENV_IS_EMBEDDED
95#else
Mike Frysinger76d82182009-07-21 22:17:36 -040096#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
Mike Frysinger9417d9a2008-10-12 21:49:28 -040097#endif
Mike Frysinger9ff67e52009-06-14 06:29:07 -040098#ifdef ENV_IS_EMBEDDED
99/* WARNING - the following is hand-optimized to fit within
100 * the sector before the environment sector. If it throws
101 * an error during compilation remove an object here to get
102 * it linked after the configuration sector.
103 */
104# define LDS_BOARD_TEXT \
105 cpu/blackfin/traps.o (.text .text.*); \
106 cpu/blackfin/interrupt.o (.text .text.*); \
107 cpu/blackfin/serial.o (.text .text.*); \
108 common/dlmalloc.o (.text .text.*); \
109 lib_generic/crc32.o (.text .text.*); \
110 . = DEFINED(env_offset) ? env_offset : .; \
111 common/env_embedded.o (.text .text.*);
112#endif
Mike Frysinger9417d9a2008-10-12 21:49:28 -0400113
114
115/*
116 * I2C Settings
117 */
118#define CONFIG_BFIN_TWI_I2C 1
119#define CONFIG_HARD_I2C 1
120#define CONFIG_SYS_I2C_SPEED 50000
121#define CONFIG_SYS_I2C_SLAVE 0
122
123
124/*
125 * Misc Settings
126 */
127#define CONFIG_BAUDRATE 115200
128#define CONFIG_MISC_INIT_R
129#define CONFIG_RTC_BFIN
130#define CONFIG_UART_CONSOLE 0
131
132
133/*
134 * Pull in common ADI header for remaining command/environment setup
135 */
136#include <configs/bfin_adi_common.h>
137
Mike Frysinger9417d9a2008-10-12 21:49:28 -0400138
139#endif