blob: 9343263be5ecd6515d956cd2560b5c059e2622cc [file] [log] [blame]
Marty E. Plummer8e2e6012019-01-05 20:12:08 -06001CONFIG_ARM=y
Tom Rinia2ac2b92021-08-27 21:18:30 -04002CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
Tom Rinif76750d2021-12-11 14:55:51 -05003CONFIG_SYS_ARCH_TIMER=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +00004# CONFIG_SPL_USE_ARCH_MEMCPY is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -06005CONFIG_ARCH_ROCKCHIP=y
6CONFIG_SYS_TEXT_BASE=0x00100000
Tom Rini554e5512020-08-10 15:31:07 -04007CONFIG_NR_DRAM_BANKS=1
Tom Rini2bba7802021-06-28 10:17:29 -04008CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
Tom Rinic5a6e9f2020-07-06 13:54:25 -04009CONFIG_SPL_TEXT_BASE=0xff704000
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060010CONFIG_ROCKCHIP_RK3288=y
Simon Glass103c5f12021-08-08 12:20:09 -060011# CONFIG_SPL_MMC is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060012CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
Tom Rinid168bcb2019-04-29 15:54:04 -040013CONFIG_SPL_STACK_R_ADDR=0x80000
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060014CONFIG_DEBUG_UART_BASE=0xff690000
15CONFIG_DEBUG_UART_CLOCK=24000000
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060016CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassea2ca7e2021-08-08 12:20:14 -060017CONFIG_SPL_SPI=y
Tom Rinid46e86d2022-04-08 13:36:51 -040018CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rini556fd592020-04-28 16:15:47 -040019CONFIG_SPL_PAYLOAD="u-boot.img"
Tom Rinif7d0ae92020-07-28 08:46:52 -040020CONFIG_DEBUG_UART=y
Simon Glass37304aa2019-07-20 20:51:14 -060021CONFIG_USE_PREBOOT=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060022CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
Tom Rini0817daa2020-10-09 12:22:06 -040023CONFIG_SILENT_CONSOLE=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060024# CONFIG_DISPLAY_CPUINFO is not set
25CONFIG_DISPLAY_BOARDINFO_LATE=y
Urja Rannikkofffdf722020-05-13 19:15:21 +000026CONFIG_BOARD_EARLY_INIT_R=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +000027# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060028CONFIG_SPL_STACK_R=y
29CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Urja Rannikko7ba79f22019-05-13 13:51:05 +000030# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
Simon Glass1e52db62021-07-14 17:05:32 -050031# CONFIG_SPL_CRC32 is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060032CONFIG_SPL_SPI_LOAD=y
Tom Rini3e5b62f2021-08-10 15:08:46 -040033CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060034CONFIG_CMD_GPIO=y
35CONFIG_CMD_GPT=y
36CONFIG_CMD_I2C=y
37CONFIG_CMD_MMC=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060038CONFIG_CMD_SF_TEST=y
39CONFIG_CMD_SPI=y
40CONFIG_CMD_USB=y
41# CONFIG_CMD_SETEXPR is not set
42CONFIG_CMD_CACHE=y
43CONFIG_CMD_TIME=y
44CONFIG_CMD_PMIC=y
45CONFIG_CMD_REGULATOR=y
46# CONFIG_SPL_DOS_PARTITION is not set
47# CONFIG_SPL_EFI_PARTITION is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060048CONFIG_SPL_OF_CONTROL=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060049CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
50CONFIG_SPL_OF_PLATDATA=y
Tom Rini8d8ee472019-11-12 22:46:36 -050051CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060052CONFIG_REGMAP=y
53CONFIG_SPL_REGMAP=y
54CONFIG_SYSCON=y
55CONFIG_SPL_SYSCON=y
56# CONFIG_SPL_SIMPLE_BUS is not set
Urja Rannikko7ba79f22019-05-13 13:51:05 +000057# CONFIG_SPL_BLK is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060058CONFIG_CLK=y
59CONFIG_SPL_CLK=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060060CONFIG_ROCKCHIP_GPIO=y
61CONFIG_I2C_CROS_EC_TUNNEL=y
62CONFIG_SYS_I2C_ROCKCHIP=y
63CONFIG_I2C_MUX=y
64CONFIG_DM_KEYBOARD=y
Simon Glass93e1edf2021-11-24 09:26:44 -070065CONFIG_KEYBOARD=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060066CONFIG_CROS_EC_KEYB=y
67CONFIG_CROS_EC=y
68CONFIG_CROS_EC_SPI=y
69CONFIG_PWRSEQ=y
Jaehoon Chung144d0572021-02-16 10:16:56 +090070CONFIG_MMC_PWRSEQ=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +000071# CONFIG_SPL_DM_MMC is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060072CONFIG_MMC_DW=y
73CONFIG_MMC_DW_ROCKCHIP=y
Miquel Raynal888f1842019-10-03 19:50:05 +020074CONFIG_MTD=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +000075CONFIG_SF_DEFAULT_BUS=2
Patrick Delaunay14453fb2019-02-27 15:20:36 +010076CONFIG_SF_DEFAULT_SPEED=20000000
Urja Rannikko64df5122019-05-13 13:51:03 +000077CONFIG_SPI_FLASH_GIGADEVICE=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060078CONFIG_PINCTRL=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +000079CONFIG_PINCONF=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060080CONFIG_SPL_PINCTRL=y
Urja Rannikko5e50f872020-05-13 19:15:23 +000081# CONFIG_SPL_PINCTRL_FULL is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060082CONFIG_DM_PMIC=y
83# CONFIG_SPL_PMIC_CHILDREN is not set
84CONFIG_PMIC_RK8XX=y
85CONFIG_DM_REGULATOR_FIXED=y
86CONFIG_REGULATOR_RK8XX=y
87CONFIG_PWM_ROCKCHIP=y
88CONFIG_RAM=y
89CONFIG_SPL_RAM=y
90CONFIG_DEBUG_UART_SHIFT=2
91CONFIG_ROCKCHIP_SERIAL=y
92CONFIG_ROCKCHIP_SPI=y
93CONFIG_SYSRESET=y
94CONFIG_USB=y
Urja Rannikko7ba79f22019-05-13 13:51:05 +000095# CONFIG_SPL_DM_USB is not set
96CONFIG_USB_DWC2=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060097CONFIG_ROCKCHIP_USB2_PHY=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -060098CONFIG_DM_VIDEO=y
Anatolij Gustschin8a6ffed2020-02-04 22:43:06 +010099# CONFIG_VIDEO_BPP8 is not set
Marty E. Plummer8e2e6012019-01-05 20:12:08 -0600100CONFIG_CONSOLE_TRUETYPE=y
101CONFIG_DISPLAY=y
102CONFIG_VIDEO_ROCKCHIP=y
103CONFIG_DISPLAY_ROCKCHIP_EDP=y
104CONFIG_DISPLAY_ROCKCHIP_HDMI=y
105# CONFIG_USE_PRIVATE_LIBGCC is not set
Urja Rannikko7ba79f22019-05-13 13:51:05 +0000106CONFIG_SPL_TINY_MEMSET=y
Marty E. Plummer8e2e6012019-01-05 20:12:08 -0600107CONFIG_CMD_DHRYSTONE=y
108CONFIG_ERRNO_STR=y