| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| Michal Simek | 509d4b9 | 2017-01-09 10:05:16 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2016 - 2017 Xilinx, Inc. |
| 4 | * |
| 5 | * Michal Simek <michal.simek@xilinx.com> |
| Michal Simek | 509d4b9 | 2017-01-09 10:05:16 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <asm/io.h> |
| 10 | #include <asm/arch/hardware.h> |
| 11 | #include <asm/arch/sys_proto.h> |
| 12 | |
| 13 | /* |
| 14 | * atfhandoffparams |
| 15 | * Parameter bitfield encoding |
| 16 | * ----------------------------------------------------------------------------- |
| 17 | * Exec State 0 0 -> Aarch64, 1-> Aarch32 |
| 18 | * endianness 1 0 -> LE, 1 -> BE |
| 19 | * secure (TZ) 2 0 -> Non secure, 1 -> secure |
| 20 | * EL 3:4 00 -> EL0, 01 -> EL1, 10 -> EL2, 11 -> EL3 |
| 21 | * CPU# 5:6 00 -> A53_0, 01 -> A53_1, 10 -> A53_2, 11 -> A53_3 |
| 22 | */ |
| 23 | |
| 24 | #define FSBL_FLAGS_ESTATE_SHIFT 0 |
| 25 | #define FSBL_FLAGS_ESTATE_MASK (1 << FSBL_FLAGS_ESTATE_SHIFT) |
| 26 | #define FSBL_FLAGS_ESTATE_A64 0 |
| 27 | #define FSBL_FLAGS_ESTATE_A32 1 |
| 28 | |
| 29 | #define FSBL_FLAGS_ENDIAN_SHIFT 1 |
| 30 | #define FSBL_FLAGS_ENDIAN_MASK (1 << FSBL_FLAGS_ENDIAN_SHIFT) |
| 31 | #define FSBL_FLAGS_ENDIAN_LE 0 |
| 32 | #define FSBL_FLAGS_ENDIAN_BE 1 |
| 33 | |
| 34 | #define FSBL_FLAGS_TZ_SHIFT 2 |
| 35 | #define FSBL_FLAGS_TZ_MASK (1 << FSBL_FLAGS_TZ_SHIFT) |
| 36 | #define FSBL_FLAGS_NON_SECURE 0 |
| 37 | #define FSBL_FLAGS_SECURE 1 |
| 38 | |
| 39 | #define FSBL_FLAGS_EL_SHIFT 3 |
| 40 | #define FSBL_FLAGS_EL_MASK (3 << FSBL_FLAGS_EL_SHIFT) |
| 41 | #define FSBL_FLAGS_EL0 0 |
| 42 | #define FSBL_FLAGS_EL1 1 |
| 43 | #define FSBL_FLAGS_EL2 2 |
| 44 | #define FSBL_FLAGS_EL3 3 |
| 45 | |
| 46 | #define FSBL_FLAGS_CPU_SHIFT 5 |
| 47 | #define FSBL_FLAGS_CPU_MASK (3 << FSBL_FLAGS_CPU_SHIFT) |
| 48 | #define FSBL_FLAGS_A53_0 0 |
| 49 | #define FSBL_FLAGS_A53_1 1 |
| 50 | #define FSBL_FLAGS_A53_2 2 |
| 51 | #define FSBL_FLAGS_A53_3 3 |
| 52 | |
| 53 | #define FSBL_MAX_PARTITIONS 8 |
| 54 | |
| 55 | /* Structure corresponding to each partition entry */ |
| 56 | struct xfsbl_partition { |
| 57 | uint64_t entry_point; |
| 58 | uint64_t flags; |
| 59 | }; |
| 60 | |
| 61 | /* Structure for handoff parameters to ARM Trusted Firmware (ATF) */ |
| 62 | struct xfsbl_atf_handoff_params { |
| 63 | uint8_t magic[4]; |
| 64 | uint32_t num_entries; |
| 65 | struct xfsbl_partition partition[FSBL_MAX_PARTITIONS]; |
| 66 | }; |
| 67 | |
| 68 | #ifdef CONFIG_SPL_OS_BOOT |
| 69 | void handoff_setup(void) |
| 70 | { |
| 71 | struct xfsbl_atf_handoff_params *atfhandoffparams; |
| 72 | |
| 73 | atfhandoffparams = (void *)CONFIG_SPL_TEXT_BASE; |
| 74 | atfhandoffparams->magic[0] = 'X'; |
| 75 | atfhandoffparams->magic[1] = 'L'; |
| 76 | atfhandoffparams->magic[2] = 'N'; |
| 77 | atfhandoffparams->magic[3] = 'X'; |
| 78 | |
| 79 | atfhandoffparams->num_entries = 1; |
| 80 | atfhandoffparams->partition[0].entry_point = CONFIG_SYS_TEXT_BASE; |
| 81 | atfhandoffparams->partition[0].flags = FSBL_FLAGS_EL2 << |
| 82 | FSBL_FLAGS_EL_SHIFT; |
| 83 | |
| 84 | writel(CONFIG_SPL_TEXT_BASE, &pmu_base->gen_storage6); |
| 85 | } |
| 86 | #endif |