stroese | 071d897 | 2003-05-23 11:35:47 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001-2003 |
| 3 | * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <asm/processor.h> |
| 26 | #include <command.h> |
stroese | 071d897 | 2003-05-23 11:35:47 +0000 | [diff] [blame] | 27 | #include <malloc.h> |
| 28 | |
stroese | 071d897 | 2003-05-23 11:35:47 +0000 | [diff] [blame] | 29 | |
stroese | 4510a7b | 2004-12-16 18:40:02 +0000 | [diff] [blame] | 30 | extern void lxt971_no_sleep(void); |
| 31 | |
| 32 | |
stroese | ef9e868 | 2003-09-12 08:46:58 +0000 | [diff] [blame] | 33 | /* fpga configuration data - not compressed, generated by bin2c */ |
| 34 | const unsigned char fpgadata[] = |
| 35 | { |
| 36 | #include "fpgadata.c" |
| 37 | }; |
| 38 | int filesize = sizeof(fpgadata); |
stroese | 071d897 | 2003-05-23 11:35:47 +0000 | [diff] [blame] | 39 | |
| 40 | |
wdenk | c837dcb | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 41 | int board_early_init_f (void) |
stroese | 071d897 | 2003-05-23 11:35:47 +0000 | [diff] [blame] | 42 | { |
| 43 | /* |
| 44 | * IRQ 0-15 405GP internally generated; active high; level sensitive |
| 45 | * IRQ 16 405GP internally generated; active low; level sensitive |
| 46 | * IRQ 17-24 RESERVED |
| 47 | * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive |
| 48 | * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive |
| 49 | * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive |
| 50 | * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive |
| 51 | * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive |
| 52 | * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive |
| 53 | * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive |
| 54 | */ |
| 55 | mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
| 56 | mtdcr(uicer, 0x00000000); /* disable all ints */ |
| 57 | mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/ |
| 58 | mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */ |
| 59 | mtdcr(uictr, 0x10000000); /* set int trigger levels */ |
| 60 | mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/ |
| 61 | mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
| 62 | |
| 63 | /* |
| 64 | * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us |
| 65 | */ |
| 66 | mtebc (epcr, 0xa8400000); |
| 67 | |
stroese | 4510a7b | 2004-12-16 18:40:02 +0000 | [diff] [blame] | 68 | /* |
| 69 | * Setup GPIO pins (CS6+CS7 as GPIO) |
| 70 | */ |
| 71 | mtdcr(cntrl0, mfdcr(cntrl0) | 0x00300000); |
| 72 | |
| 73 | /* |
| 74 | * Configure GPIO pins |
| 75 | */ |
| 76 | out32(GPIO0_ODR, 0x00000000); /* no open drain pins */ |
| 77 | out32(GPIO0_TCR, CFG_FPGA_PRG | CFG_FPGA_CLK | CFG_FPGA_DATA); /* setup for output */ |
| 78 | out32(GPIO0_OR, 0); /* outputs -> low */ |
| 79 | |
stroese | 071d897 | 2003-05-23 11:35:47 +0000 | [diff] [blame] | 80 | return 0; |
| 81 | } |
| 82 | |
| 83 | |
| 84 | /* ------------------------------------------------------------------------- */ |
| 85 | |
| 86 | int misc_init_f (void) |
| 87 | { |
| 88 | return 0; /* dummy implementation */ |
| 89 | } |
| 90 | |
| 91 | |
| 92 | int misc_init_r (void) |
| 93 | { |
stroese | 4510a7b | 2004-12-16 18:40:02 +0000 | [diff] [blame] | 94 | DECLARE_GLOBAL_DATA_PTR; |
| 95 | |
| 96 | /* adjust flash start and offset */ |
| 97 | gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; |
| 98 | gd->bd->bi_flashoffset = 0; |
| 99 | |
stroese | 071d897 | 2003-05-23 11:35:47 +0000 | [diff] [blame] | 100 | return (0); |
| 101 | } |
| 102 | |
| 103 | |
| 104 | /* |
| 105 | * Check Board Identity: |
| 106 | */ |
| 107 | |
| 108 | int checkboard (void) |
| 109 | { |
Wolfgang Denk | 77ddac9 | 2005-10-13 16:45:02 +0200 | [diff] [blame^] | 110 | char str[64]; |
stroese | 071d897 | 2003-05-23 11:35:47 +0000 | [diff] [blame] | 111 | int i = getenv_r ("serial#", str, sizeof(str)); |
| 112 | |
| 113 | puts ("Board: "); |
| 114 | |
| 115 | if (i == -1) { |
stroese | ef9e868 | 2003-09-12 08:46:58 +0000 | [diff] [blame] | 116 | puts ("### No HW ID - assuming PMC405"); |
stroese | 071d897 | 2003-05-23 11:35:47 +0000 | [diff] [blame] | 117 | } else { |
| 118 | puts(str); |
| 119 | } |
| 120 | |
| 121 | putc ('\n'); |
| 122 | |
stroese | 4510a7b | 2004-12-16 18:40:02 +0000 | [diff] [blame] | 123 | /* |
| 124 | * Disable sleep mode in LXT971 |
| 125 | */ |
| 126 | lxt971_no_sleep(); |
| 127 | |
stroese | 071d897 | 2003-05-23 11:35:47 +0000 | [diff] [blame] | 128 | return 0; |
| 129 | } |
| 130 | |
| 131 | /* ------------------------------------------------------------------------- */ |
| 132 | |
| 133 | long int initdram (int board_type) |
| 134 | { |
| 135 | unsigned long val; |
| 136 | |
| 137 | mtdcr(memcfga, mem_mb0cf); |
| 138 | val = mfdcr(memcfgd); |
| 139 | |
| 140 | #if 0 |
| 141 | printf("\nmb0cf=%x\n", val); /* test-only */ |
| 142 | printf("strap=%x\n", mfdcr(strap)); /* test-only */ |
| 143 | #endif |
| 144 | |
| 145 | return (4*1024*1024 << ((val & 0x000e0000) >> 17)); |
| 146 | } |
| 147 | |
| 148 | /* ------------------------------------------------------------------------- */ |
| 149 | |
| 150 | int testdram (void) |
| 151 | { |
| 152 | /* TODO: XXX XXX XXX */ |
| 153 | printf ("test: 16 MB - ok\n"); |
| 154 | |
| 155 | return (0); |
| 156 | } |
| 157 | |
| 158 | /* ------------------------------------------------------------------------- */ |
stroese | 4510a7b | 2004-12-16 18:40:02 +0000 | [diff] [blame] | 159 | |
| 160 | int do_cantest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 161 | { |
| 162 | ulong addr; |
| 163 | volatile uchar *ptr; |
| 164 | volatile uchar val; |
| 165 | int i; |
| 166 | |
| 167 | addr = simple_strtol (argv[1], NULL, 16) + 0x16; |
| 168 | |
| 169 | i = 0; |
| 170 | for (;;) { |
| 171 | ptr = (uchar *)addr; |
| 172 | for (i=0; i<8; i++) { |
| 173 | *ptr = i; |
| 174 | val = *ptr; |
| 175 | |
| 176 | if (val != i) { |
| 177 | printf("ERROR: addr=%p write=0x%02X, read=0x%02X\n", ptr, i, val); |
| 178 | return 0; |
| 179 | } |
| 180 | |
| 181 | /* Abort if ctrl-c was pressed */ |
| 182 | if (ctrlc()) { |
| 183 | puts("\nAbort\n"); |
| 184 | return 0; |
| 185 | } |
| 186 | |
| 187 | ptr++; |
| 188 | } |
| 189 | } |
| 190 | |
| 191 | return 0; |
| 192 | } |
| 193 | U_BOOT_CMD( |
| 194 | cantest, 3, 1, do_cantest, |
| 195 | "cantest - Test CAN controller", |
| 196 | NULL |
| 197 | ); |