| Giulio Benetti | 77eb9a9 | 2020-01-10 15:51:47 +0100 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2019 |
| 4 | * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
| 9 | #include <asm/armv7_mpu.h> |
| 10 | |
| 11 | int arch_cpu_init(void) |
| 12 | { |
| 13 | int i; |
| 14 | |
| 15 | struct mpu_region_config imxrt1050_region_config[] = { |
| 16 | { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW, |
| 17 | STRONG_ORDER, REGION_4GB }, |
| 18 | { PHYS_SDRAM, REGION_1, XN_DIS, PRIV_RW_USR_RW, |
| 19 | O_I_WB_RD_WR_ALLOC, (ffs(PHYS_SDRAM_SIZE) - 2) }, |
| 20 | { DMAMEM_BASE, |
| 21 | REGION_2, XN_DIS, PRIV_RW_USR_RW, |
| 22 | STRONG_ORDER, (ffs(DMAMEM_SZ_ALL) - 2) }, |
| 23 | }; |
| 24 | |
| 25 | /* |
| 26 | * Configure the memory protection unit (MPU) to allow full access to |
| 27 | * the whole 4GB address space. |
| 28 | */ |
| 29 | disable_mpu(); |
| 30 | for (i = 0; i < ARRAY_SIZE(imxrt1050_region_config); i++) |
| 31 | mpu_config(&imxrt1050_region_config[i]); |
| 32 | enable_mpu(); |
| 33 | |
| 34 | return 0; |
| 35 | } |