Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 2 | /* |
3 | * Configuration settings for the SAMA5D4EK board. | ||||
4 | * | ||||
5 | * Copyright (C) 2014 Atmel | ||||
6 | * Bo Shen <voice.shen@atmel.com> | ||||
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 7 | */ |
8 | |||||
9 | #ifndef __CONFIG_H | ||||
10 | #define __CONFIG_H | ||||
11 | |||||
Wu, Josh | b2d387b | 2015-03-30 14:51:19 +0800 | [diff] [blame] | 12 | #include "at91-sama5_common.h" |
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 13 | |
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 14 | /* SDRAM */ |
Tom Rini | aa6e94d | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 15 | #define CFG_SYS_SDRAM_BASE 0x20000000 |
16 | #define CFG_SYS_SDRAM_SIZE 0x20000000 | ||||
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 17 | |
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 18 | /* NAND flash */ |
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 19 | #ifdef CONFIG_CMD_NAND |
Tom Rini | 4e59094 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 20 | #define CFG_SYS_NAND_BASE 0x80000000 |
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 21 | /* our ALE is AD21 */ |
Tom Rini | 4e59094 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 22 | #define CFG_SYS_NAND_MASK_ALE (1 << 21) |
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 23 | /* our CLE is AD22 */ |
Tom Rini | 4e59094 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 24 | #define CFG_SYS_NAND_MASK_CLE (1 << 22) |
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 25 | #endif |
26 | |||||
Bo Shen | 5a4c9c2 | 2014-12-15 13:24:38 +0800 | [diff] [blame] | 27 | /* SPL */ |
Bo Shen | 5a4c9c2 | 2014-12-15 13:24:38 +0800 | [diff] [blame] | 28 | |
Bo Shen | 927b901 | 2014-11-10 15:24:02 +0800 | [diff] [blame] | 29 | #endif |