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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Bo Shen927b9012014-11-10 15:24:02 +08002/*
3 * Configuration settings for the SAMA5D4EK board.
4 *
5 * Copyright (C) 2014 Atmel
6 * Bo Shen <voice.shen@atmel.com>
Bo Shen927b9012014-11-10 15:24:02 +08007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Wu, Joshb2d387b2015-03-30 14:51:19 +080012#include "at91-sama5_common.h"
Bo Shen927b9012014-11-10 15:24:02 +080013
Bo Shen927b9012014-11-10 15:24:02 +080014/* SDRAM */
Tom Riniaa6e94d2022-11-16 13:10:37 -050015#define CFG_SYS_SDRAM_BASE 0x20000000
16#define CFG_SYS_SDRAM_SIZE 0x20000000
Bo Shen927b9012014-11-10 15:24:02 +080017
Bo Shen927b9012014-11-10 15:24:02 +080018/* NAND flash */
Bo Shen927b9012014-11-10 15:24:02 +080019#ifdef CONFIG_CMD_NAND
Tom Rini4e590942022-11-12 17:36:51 -050020#define CFG_SYS_NAND_BASE 0x80000000
Bo Shen927b9012014-11-10 15:24:02 +080021/* our ALE is AD21 */
Tom Rini4e590942022-11-12 17:36:51 -050022#define CFG_SYS_NAND_MASK_ALE (1 << 21)
Bo Shen927b9012014-11-10 15:24:02 +080023/* our CLE is AD22 */
Tom Rini4e590942022-11-12 17:36:51 -050024#define CFG_SYS_NAND_MASK_CLE (1 << 22)
Bo Shen927b9012014-11-10 15:24:02 +080025#endif
26
Bo Shen5a4c9c22014-12-15 13:24:38 +080027/* SPL */
Bo Shen5a4c9c22014-12-15 13:24:38 +080028
Bo Shen927b9012014-11-10 15:24:02 +080029#endif