Claudiu Beznea | 01c35f2 | 2020-10-01 13:27:25 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries |
| 4 | * |
| 5 | * Author: Claudiu Beznea <claudiu.beznea@microchip.com> |
| 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <cpu.h> |
| 10 | #include <dm.h> |
| 11 | #include <div64.h> |
| 12 | #include <linux/clk-provider.h> |
| 13 | |
| 14 | struct at91_cpu_platdata { |
| 15 | const char *name; |
| 16 | ulong cpufreq_mhz; |
| 17 | ulong mckfreq_mhz; |
| 18 | ulong xtalfreq_mhz; |
| 19 | }; |
| 20 | |
| 21 | extern char *get_cpu_name(void); |
| 22 | |
| 23 | const char *at91_cpu_get_name(void) |
| 24 | { |
| 25 | return get_cpu_name(); |
| 26 | } |
| 27 | |
| 28 | int at91_cpu_get_desc(const struct udevice *dev, char *buf, int size) |
| 29 | { |
| 30 | struct at91_cpu_platdata *plat = dev_get_platdata(dev); |
| 31 | |
| 32 | snprintf(buf, size, "%s\n" |
| 33 | "Crystal frequency: %8lu MHz\n" |
| 34 | "CPU clock : %8lu MHz\n" |
| 35 | "Master clock : %8lu MHz\n", |
| 36 | plat->name, plat->xtalfreq_mhz, plat->cpufreq_mhz, |
| 37 | plat->mckfreq_mhz); |
| 38 | |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | static int at91_cpu_get_info(const struct udevice *dev, struct cpu_info *info) |
| 43 | { |
| 44 | struct at91_cpu_platdata *plat = dev_get_platdata(dev); |
| 45 | |
| 46 | info->cpu_freq = plat->cpufreq_mhz * 1000000; |
| 47 | info->features = BIT(CPU_FEAT_L1_CACHE); |
| 48 | |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | static int at91_cpu_get_count(const struct udevice *dev) |
| 53 | { |
| 54 | return 1; |
| 55 | } |
| 56 | |
| 57 | static int at91_cpu_get_vendor(const struct udevice *dev, char *buf, int size) |
| 58 | { |
| 59 | snprintf(buf, size, "Microchip Technology Inc."); |
| 60 | |
| 61 | return 0; |
| 62 | } |
| 63 | |
| 64 | static const struct cpu_ops at91_cpu_ops = { |
| 65 | .get_desc = at91_cpu_get_desc, |
| 66 | .get_info = at91_cpu_get_info, |
| 67 | .get_count = at91_cpu_get_count, |
| 68 | .get_vendor = at91_cpu_get_vendor, |
| 69 | }; |
| 70 | |
| 71 | static const struct udevice_id at91_cpu_ids[] = { |
| 72 | { .compatible = "arm,cortex-a7" }, |
| 73 | { /* Sentinel. */ } |
| 74 | }; |
| 75 | |
| 76 | static int at91_cpu_probe(struct udevice *dev) |
| 77 | { |
| 78 | struct at91_cpu_platdata *plat = dev_get_platdata(dev); |
| 79 | struct clk clk; |
| 80 | ulong rate; |
| 81 | int ret; |
| 82 | |
| 83 | ret = clk_get_by_index(dev, 0, &clk); |
| 84 | if (ret) |
| 85 | return ret; |
| 86 | |
| 87 | rate = clk_get_rate(&clk); |
| 88 | if (!rate) |
| 89 | return -ENOTSUPP; |
| 90 | plat->cpufreq_mhz = DIV_ROUND_CLOSEST_ULL(rate, 1000000); |
| 91 | |
| 92 | ret = clk_get_by_index(dev, 1, &clk); |
| 93 | if (ret) |
| 94 | return ret; |
| 95 | |
| 96 | rate = clk_get_rate(&clk); |
| 97 | if (!rate) |
| 98 | return -ENOTSUPP; |
| 99 | plat->mckfreq_mhz = DIV_ROUND_CLOSEST_ULL(rate, 1000000); |
| 100 | |
| 101 | ret = clk_get_by_index(dev, 2, &clk); |
| 102 | if (ret) |
| 103 | return ret; |
| 104 | |
| 105 | rate = clk_get_rate(&clk); |
| 106 | if (!rate) |
| 107 | return -ENOTSUPP; |
| 108 | plat->xtalfreq_mhz = DIV_ROUND_CLOSEST_ULL(rate, 1000000); |
| 109 | |
| 110 | plat->name = get_cpu_name(); |
| 111 | |
| 112 | return 0; |
| 113 | } |
| 114 | |
| 115 | U_BOOT_DRIVER(cpu_at91_drv) = { |
| 116 | .name = "at91-cpu", |
| 117 | .id = UCLASS_CPU, |
| 118 | .of_match = at91_cpu_ids, |
| 119 | .ops = &at91_cpu_ops, |
| 120 | .probe = at91_cpu_probe, |
| 121 | .platdata_auto_alloc_size = sizeof(struct at91_cpu_platdata), |
| 122 | .flags = DM_FLAG_PRE_RELOC, |
| 123 | }; |