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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 78a08019cd743e681b7172b7deff1d17f6a6568d / . / arch / arm / dts / r8a7790.dtsi
blob: ed09e56c362bffaf7482d12548d2631fa790ead1 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Marek Vasut16b6e4a2018-01-07 20:17:23 +0100[diff] [blame]2/*
3 * Device Tree Source for the r8a7790 SoC
4 *
5 * Copyright (C) 2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2014 Cogent Embedded Inc.
Marek Vasut16b6e4a2018-01-07 20:17:23 +0100[diff] [blame]8 */
9
10#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11#include <dt-bindings/interrupt-controller/arm-gic.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/power/r8a7790-sysc.h>
14
15/ {
16 compatible = "renesas,r8a7790";
Marek Vasut16b6e4a2018-01-07 20:17:23 +0100[diff] [blame]17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 i2c3 = &i2c3;
25 i2c4 = &iic0;
26 i2c5 = &iic1;
27 i2c6 = &iic2;
28 i2c7 = &iic3;
29 spi0 = &qspi;
30 spi1 = &msiof0;
31 spi2 = &msiof1;
32 spi3 = &msiof2;
33 spi4 = &msiof3;
34 vin0 = &vin0;
35 vin1 = &vin1;
36 vin2 = &vin2;
37 vin3 = &vin3;
38 };
39
Marek Vasut252c8b42018-06-06 19:58:17 +0200[diff] [blame]40 /*
41 * The external audio clocks are configured as 0 Hz fixed frequency
42 * clocks by default.
43 * Boards that provide audio clocks should override them.
44 */
45 audio_clk_a: audio_clk_a {
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 clock-frequency = <0>;
49 };
50 audio_clk_b: audio_clk_b {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55 audio_clk_c: audio_clk_c {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 clock-frequency = <0>;
59 };
60
61 /* External CAN clock */
62 can_clk: can {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 /* This value must be overridden by the board. */
66 clock-frequency = <0>;
67 };
68
Marek Vasut16b6e4a2018-01-07 20:17:23 +0100[diff] [blame]69 cpus {
70 #address-cells = <1>;
71 #size-cells = <0>;
72 enable-method = "renesas,apmu";
73
74 cpu0: cpu@0 {
75 device_type = "cpu";
76 compatible = "arm,cortex-a15";
77 reg = <0>;
78 clock-frequency = <1300000000>;
79 voltage-tolerance = <1>; /* 1% */
80 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
81 clock-latency = <300000>; /* 300 us */
82 power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
83 next-level-cache = <&L2_CA15>;
84 capacity-dmips-mhz = <1024>;
85
86 /* kHz - uV - OPPs unknown yet */
87 operating-points = <1400000 1000000>,
88 <1225000 1000000>,
89 <1050000 1000000>,
90 < 875000 1000000>,
91 < 700000 1000000>,
92 < 350000 1000000>;
93 };
94
95 cpu1: cpu@1 {
96 device_type = "cpu";
97 compatible = "arm,cortex-a15";
98 reg = <1>;
99 clock-frequency = <1300000000>;
100 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
101 power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
102 next-level-cache = <&L2_CA15>;
103 capacity-dmips-mhz = <1024>;
104 };
105
106 cpu2: cpu@2 {
107 device_type = "cpu";
108 compatible = "arm,cortex-a15";
109 reg = <2>;
110 clock-frequency = <1300000000>;
111 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
112 power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
113 next-level-cache = <&L2_CA15>;
114 capacity-dmips-mhz = <1024>;
115 };
116
117 cpu3: cpu@3 {
118 device_type = "cpu";
119 compatible = "arm,cortex-a15";
120 reg = <3>;
121 clock-frequency = <1300000000>;
122 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
123 power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
124 next-level-cache = <&L2_CA15>;
125 capacity-dmips-mhz = <1024>;
126 };
127
128 cpu4: cpu@100 {
129 device_type = "cpu";
130 compatible = "arm,cortex-a7";
131 reg = <0x100>;
132 clock-frequency = <780000000>;
133 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
134 power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
135 next-level-cache = <&L2_CA7>;
136 capacity-dmips-mhz = <539>;
137 };
138
139 cpu5: cpu@101 {
140 device_type = "cpu";
141 compatible = "arm,cortex-a7";
142 reg = <0x101>;
143 clock-frequency = <780000000>;
144 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
145 power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
146 next-level-cache = <&L2_CA7>;
147 capacity-dmips-mhz = <539>;
148 };
149
150 cpu6: cpu@102 {
151 device_type = "cpu";
152 compatible = "arm,cortex-a7";
153 reg = <0x102>;
154 clock-frequency = <780000000>;
155 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
156 power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
157 next-level-cache = <&L2_CA7>;
158 capacity-dmips-mhz = <539>;
159 };
160
161 cpu7: cpu@103 {
162 device_type = "cpu";
163 compatible = "arm,cortex-a7";
164 reg = <0x103>;
165 clock-frequency = <780000000>;
166 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
167 power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
168 next-level-cache = <&L2_CA7>;
169 capacity-dmips-mhz = <539>;
170 };
171
172 L2_CA15: cache-controller-0 {
173 compatible = "cache";
174 power-domains = <&sysc R8A7790_PD_CA15_SCU>;
175 cache-unified;
176 cache-level = <2>;
177 };
178
179 L2_CA7: cache-controller-1 {
180 compatible = "cache";
181 power-domains = <&sysc R8A7790_PD_CA7_SCU>;
182 cache-unified;
183 cache-level = <2>;
184 };
185 };
186
Marek Vasut16b6e4a2018-01-07 20:17:23 +0100[diff] [blame]187 /* External root clock */
188 extal_clk: extal {
189 compatible = "fixed-clock";
190 #clock-cells = <0>;
191 /* This value must be overridden by the board. */
192 clock-frequency = <0>;
193 };
194
195 /* External PCIe clock - can be overridden by the board */
196 pcie_bus_clk: pcie_bus {
197 compatible = "fixed-clock";
198 #clock-cells = <0>;
199 clock-frequency = <0>;
200 };
201
Marek Vasut16b6e4a2018-01-07 20:17:23 +0100[diff] [blame]202 /* External SCIF clock */
203 scif_clk: scif {
204 compatible = "fixed-clock";
205 #clock-cells = <0>;
206 /* This value must be overridden by the board. */
207 clock-frequency = <0>;
208 };
209
Marek Vasut252c8b42018-06-06 19:58:17 +0200[diff] [blame]210 soc {
211 compatible = "simple-bus";
212 interrupt-parent = <&gic>;
213
214 #address-cells = <2>;
215 #size-cells = <2>;
216 ranges;
217
218 gpio0: gpio@e6050000 {
219 compatible = "renesas,gpio-r8a7790",
220 "renesas,rcar-gen2-gpio";
221 reg = <0 0xe6050000 0 0x50>;
222 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
223 #gpio-cells = <2>;
224 gpio-controller;
225 gpio-ranges = <&pfc 0 0 32>;
226 #interrupt-cells = <2>;
227 interrupt-controller;
228 clocks = <&cpg CPG_MOD 912>;
229 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
230 resets = <&cpg 912>;
231 };
232
233 gpio1: gpio@e6051000 {
234 compatible = "renesas,gpio-r8a7790",
235 "renesas,rcar-gen2-gpio";
236 reg = <0 0xe6051000 0 0x50>;
237 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
238 #gpio-cells = <2>;
239 gpio-controller;
240 gpio-ranges = <&pfc 0 32 30>;
241 #interrupt-cells = <2>;
242 interrupt-controller;
243 clocks = <&cpg CPG_MOD 911>;
244 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
245 resets = <&cpg 911>;
246 };
247
248 gpio2: gpio@e6052000 {
249 compatible = "renesas,gpio-r8a7790",
250 "renesas,rcar-gen2-gpio";
251 reg = <0 0xe6052000 0 0x50>;
252 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
253 #gpio-cells = <2>;
254 gpio-controller;
255 gpio-ranges = <&pfc 0 64 30>;
256 #interrupt-cells = <2>;
257 interrupt-controller;
258 clocks = <&cpg CPG_MOD 910>;
259 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
260 resets = <&cpg 910>;
261 };
262
263 gpio3: gpio@e6053000 {
264 compatible = "renesas,gpio-r8a7790",
265 "renesas,rcar-gen2-gpio";
266 reg = <0 0xe6053000 0 0x50>;
267 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
268 #gpio-cells = <2>;
269 gpio-controller;
270 gpio-ranges = <&pfc 0 96 32>;
271 #interrupt-cells = <2>;
272 interrupt-controller;
273 clocks = <&cpg CPG_MOD 909>;
274 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
275 resets = <&cpg 909>;
276 };
277
278 gpio4: gpio@e6054000 {
279 compatible = "renesas,gpio-r8a7790",
280 "renesas,rcar-gen2-gpio";
281 reg = <0 0xe6054000 0 0x50>;
282 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
283 #gpio-cells = <2>;
284 gpio-controller;
285 gpio-ranges = <&pfc 0 128 32>;
286 #interrupt-cells = <2>;
287 interrupt-controller;
288 clocks = <&cpg CPG_MOD 908>;
289 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
290 resets = <&cpg 908>;
291 };
292
293 gpio5: gpio@e6055000 {
294 compatible = "renesas,gpio-r8a7790",
295 "renesas,rcar-gen2-gpio";
296 reg = <0 0xe6055000 0 0x50>;
297 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
298 #gpio-cells = <2>;
299 gpio-controller;
300 gpio-ranges = <&pfc 0 160 32>;
301 #interrupt-cells = <2>;
302 interrupt-controller;
303 clocks = <&cpg CPG_MOD 907>;
304 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
305 resets = <&cpg 907>;
306 };
307
308 pfc: pin-controller@e6060000 {
309 compatible = "renesas,pfc-r8a7790";
310 reg = <0 0xe6060000 0 0x250>;
311 };
312
313 cpg: clock-controller@e6150000 {
314 compatible = "renesas,r8a7790-cpg-mssr";
315 reg = <0 0xe6150000 0 0x1000>;
316 clocks = <&extal_clk>, <&usb_extal_clk>;
317 clock-names = "extal", "usb_extal";
318 #clock-cells = <2>;
319 #power-domain-cells = <0>;
320 #reset-cells = <1>;
321 };
322
323 apmu@e6151000 {
324 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
325 reg = <0 0xe6151000 0 0x188>;
326 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
327 };
328
329 apmu@e6152000 {
330 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
331 reg = <0 0xe6152000 0 0x188>;
332 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
333 };
334
335 rst: reset-controller@e6160000 {
336 compatible = "renesas,r8a7790-rst";
337 reg = <0 0xe6160000 0 0x0100>;
338 };
339
340 sysc: system-controller@e6180000 {
341 compatible = "renesas,r8a7790-sysc";
342 reg = <0 0xe6180000 0 0x0200>;
343 #power-domain-cells = <1>;
344 };
345
346 irqc0: interrupt-controller@e61c0000 {
347 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
348 #interrupt-cells = <2>;
349 interrupt-controller;
350 reg = <0 0xe61c0000 0 0x200>;
351 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
352 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
353 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
354 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
355 clocks = <&cpg CPG_MOD 407>;
356 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
357 resets = <&cpg 407>;
358 };
359
360 thermal: thermal@e61f0000 {
361 compatible = "renesas,thermal-r8a7790",
362 "renesas,rcar-gen2-thermal",
363 "renesas,rcar-thermal";
364 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
365 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
366 clocks = <&cpg CPG_MOD 522>;
367 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
368 resets = <&cpg 522>;
369 #thermal-sensor-cells = <0>;
370 };
371
372 ipmmu_sy0: mmu@e6280000 {
373 compatible = "renesas,ipmmu-r8a7790",
374 "renesas,ipmmu-vmsa";
375 reg = <0 0xe6280000 0 0x1000>;
376 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
377 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
378 #iommu-cells = <1>;
379 status = "disabled";
380 };
381
382 ipmmu_sy1: mmu@e6290000 {
383 compatible = "renesas,ipmmu-r8a7790",
384 "renesas,ipmmu-vmsa";
385 reg = <0 0xe6290000 0 0x1000>;
386 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
387 #iommu-cells = <1>;
388 status = "disabled";
389 };
390
391 ipmmu_ds: mmu@e6740000 {
392 compatible = "renesas,ipmmu-r8a7790",
393 "renesas,ipmmu-vmsa";
394 reg = <0 0xe6740000 0 0x1000>;
395 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
396 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
397 #iommu-cells = <1>;
398 status = "disabled";
399 };
400
401 ipmmu_mp: mmu@ec680000 {
402 compatible = "renesas,ipmmu-r8a7790",
403 "renesas,ipmmu-vmsa";
404 reg = <0 0xec680000 0 0x1000>;
405 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
406 #iommu-cells = <1>;
407 status = "disabled";
408 };
409
410 ipmmu_mx: mmu@fe951000 {
411 compatible = "renesas,ipmmu-r8a7790",
412 "renesas,ipmmu-vmsa";
413 reg = <0 0xfe951000 0 0x1000>;
414 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
415 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
416 #iommu-cells = <1>;
417 status = "disabled";
418 };
419
420 ipmmu_rt: mmu@ffc80000 {
421 compatible = "renesas,ipmmu-r8a7790",
422 "renesas,ipmmu-vmsa";
423 reg = <0 0xffc80000 0 0x1000>;
424 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
425 #iommu-cells = <1>;
426 status = "disabled";
427 };
428
429 icram0: sram@e63a0000 {
430 compatible = "mmio-sram";
431 reg = <0 0xe63a0000 0 0x12000>;
432 };
433
434 icram1: sram@e63c0000 {
435 compatible = "mmio-sram";
436 reg = <0 0xe63c0000 0 0x1000>;
437 #address-cells = <1>;
438 #size-cells = <1>;
439 ranges = <0 0 0xe63c0000 0x1000>;
440
441 smp-sram@0 {
442 compatible = "renesas,smp-sram";
443 reg = <0 0x10>;
444 };
445 };
446
447 i2c0: i2c@e6508000 {
448 #address-cells = <1>;
449 #size-cells = <0>;
450 compatible = "renesas,i2c-r8a7790",
451 "renesas,rcar-gen2-i2c";
452 reg = <0 0xe6508000 0 0x40>;
453 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
454 clocks = <&cpg CPG_MOD 931>;
455 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
456 resets = <&cpg 931>;
457 i2c-scl-internal-delay-ns = <110>;
458 status = "disabled";
459 };
460
461 i2c1: i2c@e6518000 {
462 #address-cells = <1>;
463 #size-cells = <0>;
464 compatible = "renesas,i2c-r8a7790",
465 "renesas,rcar-gen2-i2c";
466 reg = <0 0xe6518000 0 0x40>;
467 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
468 clocks = <&cpg CPG_MOD 930>;
469 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
470 resets = <&cpg 930>;
471 i2c-scl-internal-delay-ns = <6>;
472 status = "disabled";
473 };
474
475 i2c2: i2c@e6530000 {
476 #address-cells = <1>;
477 #size-cells = <0>;
478 compatible = "renesas,i2c-r8a7790",
479 "renesas,rcar-gen2-i2c";
480 reg = <0 0xe6530000 0 0x40>;
481 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&cpg CPG_MOD 929>;
483 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
484 resets = <&cpg 929>;
485 i2c-scl-internal-delay-ns = <6>;
486 status = "disabled";
487 };
488
489 i2c3: i2c@e6540000 {
490 #address-cells = <1>;
491 #size-cells = <0>;
492 compatible = "renesas,i2c-r8a7790",
493 "renesas,rcar-gen2-i2c";
494 reg = <0 0xe6540000 0 0x40>;
495 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
496 clocks = <&cpg CPG_MOD 928>;
497 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
498 resets = <&cpg 928>;
499 i2c-scl-internal-delay-ns = <110>;
500 status = "disabled";
501 };
502
503 iic0: i2c@e6500000 {
504 #address-cells = <1>;
505 #size-cells = <0>;
506 compatible = "renesas,iic-r8a7790",
507 "renesas,rcar-gen2-iic",
508 "renesas,rmobile-iic";
509 reg = <0 0xe6500000 0 0x425>;
510 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
511 clocks = <&cpg CPG_MOD 318>;
512 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
513 <&dmac1 0x61>, <&dmac1 0x62>;
514 dma-names = "tx", "rx", "tx", "rx";
515 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
516 resets = <&cpg 318>;
517 status = "disabled";
518 };
519
520 iic1: i2c@e6510000 {
521 #address-cells = <1>;
522 #size-cells = <0>;
523 compatible = "renesas,iic-r8a7790",
524 "renesas,rcar-gen2-iic",
525 "renesas,rmobile-iic";
526 reg = <0 0xe6510000 0 0x425>;
527 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
528 clocks = <&cpg CPG_MOD 323>;
529 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
530 <&dmac1 0x65>, <&dmac1 0x66>;
531 dma-names = "tx", "rx", "tx", "rx";
532 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
533 resets = <&cpg 323>;
534 status = "disabled";
535 };
536
537 iic2: i2c@e6520000 {
538 #address-cells = <1>;
539 #size-cells = <0>;
540 compatible = "renesas,iic-r8a7790",
541 "renesas,rcar-gen2-iic",
542 "renesas,rmobile-iic";
543 reg = <0 0xe6520000 0 0x425>;
544 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
545 clocks = <&cpg CPG_MOD 300>;
546 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
547 <&dmac1 0x69>, <&dmac1 0x6a>;
548 dma-names = "tx", "rx", "tx", "rx";
549 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
550 resets = <&cpg 300>;
551 status = "disabled";
552 };
553
554 iic3: i2c@e60b0000 {
555 #address-cells = <1>;
556 #size-cells = <0>;
557 compatible = "renesas,iic-r8a7790",
558 "renesas,rcar-gen2-iic",
559 "renesas,rmobile-iic";
560 reg = <0 0xe60b0000 0 0x425>;
561 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
562 clocks = <&cpg CPG_MOD 926>;
563 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
564 <&dmac1 0x77>, <&dmac1 0x78>;
565 dma-names = "tx", "rx", "tx", "rx";
566 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
567 resets = <&cpg 926>;
568 status = "disabled";
569 };
570
571 hsusb: usb@e6590000 {
572 compatible = "renesas,usbhs-r8a7790",
573 "renesas,rcar-gen2-usbhs";
574 reg = <0 0xe6590000 0 0x100>;
575 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 704>;
577 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
578 <&usb_dmac1 0>, <&usb_dmac1 1>;
579 dma-names = "ch0", "ch1", "ch2", "ch3";
580 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
581 resets = <&cpg 704>;
582 renesas,buswait = <4>;
583 phys = <&usb0 1>;
584 phy-names = "usb";
585 status = "disabled";
586 };
587
588 usbphy: usb-phy@e6590100 {
589 compatible = "renesas,usb-phy-r8a7790",
590 "renesas,rcar-gen2-usb-phy";
591 reg = <0 0xe6590100 0 0x100>;
592 #address-cells = <1>;
593 #size-cells = <0>;
594 clocks = <&cpg CPG_MOD 704>;
595 clock-names = "usbhs";
596 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
597 resets = <&cpg 704>;
598 status = "disabled";
599
600 usb0: usb-channel@0 {
601 reg = <0>;
602 #phy-cells = <1>;
603 };
604 usb2: usb-channel@2 {
605 reg = <2>;
606 #phy-cells = <1>;
607 };
608 };
609
610 usb_dmac0: dma-controller@e65a0000 {
611 compatible = "renesas,r8a7790-usb-dmac",
612 "renesas,usb-dmac";
613 reg = <0 0xe65a0000 0 0x100>;
614 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
615 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
616 interrupt-names = "ch0", "ch1";
617 clocks = <&cpg CPG_MOD 330>;
618 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
619 resets = <&cpg 330>;
620 #dma-cells = <1>;
621 dma-channels = <2>;
622 };
623
624 usb_dmac1: dma-controller@e65b0000 {
625 compatible = "renesas,r8a7790-usb-dmac",
626 "renesas,usb-dmac";
627 reg = <0 0xe65b0000 0 0x100>;
628 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
629 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
630 interrupt-names = "ch0", "ch1";
631 clocks = <&cpg CPG_MOD 331>;
632 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
633 resets = <&cpg 331>;
634 #dma-cells = <1>;
635 dma-channels = <2>;
636 };
637
638 dmac0: dma-controller@e6700000 {
639 compatible = "renesas,dmac-r8a7790",
640 "renesas,rcar-dmac";
641 reg = <0 0xe6700000 0 0x20000>;
642 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
643 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
644 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
645 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
646 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
647 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
648 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
649 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
650 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
651 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
652 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
653 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
654 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
655 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
656 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
657 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
658 interrupt-names = "error",
659 "ch0", "ch1", "ch2", "ch3",
660 "ch4", "ch5", "ch6", "ch7",
661 "ch8", "ch9", "ch10", "ch11",
662 "ch12", "ch13", "ch14";
663 clocks = <&cpg CPG_MOD 219>;
664 clock-names = "fck";
665 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
666 resets = <&cpg 219>;
667 #dma-cells = <1>;
668 dma-channels = <15>;
669 };
670
671 dmac1: dma-controller@e6720000 {
672 compatible = "renesas,dmac-r8a7790",
673 "renesas,rcar-dmac";
674 reg = <0 0xe6720000 0 0x20000>;
675 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
676 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
677 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
678 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
679 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
680 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
681 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
682 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
683 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
684 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
685 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
686 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
687 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
688 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
689 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
690 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
691 interrupt-names = "error",
692 "ch0", "ch1", "ch2", "ch3",
693 "ch4", "ch5", "ch6", "ch7",
694 "ch8", "ch9", "ch10", "ch11",
695 "ch12", "ch13", "ch14";
696 clocks = <&cpg CPG_MOD 218>;
697 clock-names = "fck";
698 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
699 resets = <&cpg 218>;
700 #dma-cells = <1>;
701 dma-channels = <15>;
702 };
703
704 avb: ethernet@e6800000 {
705 compatible = "renesas,etheravb-r8a7790",
706 "renesas,etheravb-rcar-gen2";
707 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
708 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
709 clocks = <&cpg CPG_MOD 812>;
710 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
711 resets = <&cpg 812>;
712 #address-cells = <1>;
713 #size-cells = <0>;
714 status = "disabled";
715 };
716
717 qspi: spi@e6b10000 {
718 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
719 reg = <0 0xe6b10000 0 0x2c>;
720 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
721 clocks = <&cpg CPG_MOD 917>;
722 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
723 <&dmac1 0x17>, <&dmac1 0x18>;
724 dma-names = "tx", "rx", "tx", "rx";
725 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
726 resets = <&cpg 917>;
727 num-cs = <1>;
728 #address-cells = <1>;
729 #size-cells = <0>;
730 status = "disabled";
731 };
732
733 scifa0: serial@e6c40000 {
734 compatible = "renesas,scifa-r8a7790",
735 "renesas,rcar-gen2-scifa", "renesas,scifa";
736 reg = <0 0xe6c40000 0 64>;
737 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
738 clocks = <&cpg CPG_MOD 204>;
739 clock-names = "fck";
740 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
741 <&dmac1 0x21>, <&dmac1 0x22>;
742 dma-names = "tx", "rx", "tx", "rx";
743 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
744 resets = <&cpg 204>;
745 status = "disabled";
746 };
747
748 scifa1: serial@e6c50000 {
749 compatible = "renesas,scifa-r8a7790",
750 "renesas,rcar-gen2-scifa", "renesas,scifa";
751 reg = <0 0xe6c50000 0 64>;
752 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
753 clocks = <&cpg CPG_MOD 203>;
754 clock-names = "fck";
755 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
756 <&dmac1 0x25>, <&dmac1 0x26>;
757 dma-names = "tx", "rx", "tx", "rx";
758 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
759 resets = <&cpg 203>;
760 status = "disabled";
761 };
762
763 scifa2: serial@e6c60000 {
764 compatible = "renesas,scifa-r8a7790",
765 "renesas,rcar-gen2-scifa", "renesas,scifa";
766 reg = <0 0xe6c60000 0 64>;
767 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
768 clocks = <&cpg CPG_MOD 202>;
769 clock-names = "fck";
770 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
771 <&dmac1 0x27>, <&dmac1 0x28>;
772 dma-names = "tx", "rx", "tx", "rx";
773 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
774 resets = <&cpg 202>;
775 status = "disabled";
776 };
777
778 scifb0: serial@e6c20000 {
779 compatible = "renesas,scifb-r8a7790",
780 "renesas,rcar-gen2-scifb", "renesas,scifb";
781 reg = <0 0xe6c20000 0 0x100>;
782 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
783 clocks = <&cpg CPG_MOD 206>;
784 clock-names = "fck";
785 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
786 <&dmac1 0x3d>, <&dmac1 0x3e>;
787 dma-names = "tx", "rx", "tx", "rx";
788 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
789 resets = <&cpg 206>;
790 status = "disabled";
791 };
792
793 scifb1: serial@e6c30000 {
794 compatible = "renesas,scifb-r8a7790",
795 "renesas,rcar-gen2-scifb", "renesas,scifb";
796 reg = <0 0xe6c30000 0 0x100>;
797 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
798 clocks = <&cpg CPG_MOD 207>;
799 clock-names = "fck";
800 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
801 <&dmac1 0x19>, <&dmac1 0x1a>;
802 dma-names = "tx", "rx", "tx", "rx";
803 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
804 resets = <&cpg 207>;
805 status = "disabled";
806 };
807
808 scifb2: serial@e6ce0000 {
809 compatible = "renesas,scifb-r8a7790",
810 "renesas,rcar-gen2-scifb", "renesas,scifb";
811 reg = <0 0xe6ce0000 0 0x100>;
812 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
813 clocks = <&cpg CPG_MOD 216>;
814 clock-names = "fck";
815 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
816 <&dmac1 0x1d>, <&dmac1 0x1e>;
817 dma-names = "tx", "rx", "tx", "rx";
818 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
819 resets = <&cpg 216>;
820 status = "disabled";
821 };
822
823 scif0: serial@e6e60000 {
824 compatible = "renesas,scif-r8a7790",
825 "renesas,rcar-gen2-scif",
826 "renesas,scif";
827 reg = <0 0xe6e60000 0 64>;
828 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&cpg CPG_MOD 721>,
830 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
831 clock-names = "fck", "brg_int", "scif_clk";
832 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
833 <&dmac1 0x29>, <&dmac1 0x2a>;
834 dma-names = "tx", "rx", "tx", "rx";
835 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
836 resets = <&cpg 721>;
837 status = "disabled";
838 };
839
840 scif1: serial@e6e68000 {
841 compatible = "renesas,scif-r8a7790",
842 "renesas,rcar-gen2-scif",
843 "renesas,scif";
844 reg = <0 0xe6e68000 0 64>;
845 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
846 clocks = <&cpg CPG_MOD 720>,
847 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
848 clock-names = "fck", "brg_int", "scif_clk";
849 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
850 <&dmac1 0x2d>, <&dmac1 0x2e>;
851 dma-names = "tx", "rx", "tx", "rx";
852 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
853 resets = <&cpg 720>;
854 status = "disabled";
855 };
856
857 scif2: serial@e6e56000 {
858 compatible = "renesas,scif-r8a7790",
859 "renesas,rcar-gen2-scif",
860 "renesas,scif";
861 reg = <0 0xe6e56000 0 64>;
862 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
863 clocks = <&cpg CPG_MOD 310>,
864 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
865 clock-names = "fck", "brg_int", "scif_clk";
866 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
867 <&dmac1 0x2b>, <&dmac1 0x2c>;
868 dma-names = "tx", "rx", "tx", "rx";
869 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
870 resets = <&cpg 310>;
871 status = "disabled";
872 };
873
874 hscif0: serial@e62c0000 {
875 compatible = "renesas,hscif-r8a7790",
876 "renesas,rcar-gen2-hscif", "renesas,hscif";
877 reg = <0 0xe62c0000 0 96>;
878 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
879 clocks = <&cpg CPG_MOD 717>,
880 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
881 clock-names = "fck", "brg_int", "scif_clk";
882 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
883 <&dmac1 0x39>, <&dmac1 0x3a>;
884 dma-names = "tx", "rx", "tx", "rx";
885 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
886 resets = <&cpg 717>;
887 status = "disabled";
888 };
889
890 hscif1: serial@e62c8000 {
891 compatible = "renesas,hscif-r8a7790",
892 "renesas,rcar-gen2-hscif", "renesas,hscif";
893 reg = <0 0xe62c8000 0 96>;
894 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
895 clocks = <&cpg CPG_MOD 716>,
896 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
897 clock-names = "fck", "brg_int", "scif_clk";
898 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
899 <&dmac1 0x4d>, <&dmac1 0x4e>;
900 dma-names = "tx", "rx", "tx", "rx";
901 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
902 resets = <&cpg 716>;
903 status = "disabled";
904 };
905
906 msiof0: spi@e6e20000 {
907 compatible = "renesas,msiof-r8a7790",
908 "renesas,rcar-gen2-msiof";
909 reg = <0 0xe6e20000 0 0x0064>;
910 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
911 clocks = <&cpg CPG_MOD 0>;
912 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
913 <&dmac1 0x51>, <&dmac1 0x52>;
914 dma-names = "tx", "rx", "tx", "rx";
915 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
916 resets = <&cpg 0>;
917 #address-cells = <1>;
918 #size-cells = <0>;
919 status = "disabled";
920 };
921
922 msiof1: spi@e6e10000 {
923 compatible = "renesas,msiof-r8a7790",
924 "renesas,rcar-gen2-msiof";
925 reg = <0 0xe6e10000 0 0x0064>;
926 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
927 clocks = <&cpg CPG_MOD 208>;
928 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
929 <&dmac1 0x55>, <&dmac1 0x56>;
930 dma-names = "tx", "rx", "tx", "rx";
931 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
932 resets = <&cpg 208>;
933 #address-cells = <1>;
934 #size-cells = <0>;
935 status = "disabled";
936 };
937
938 msiof2: spi@e6e00000 {
939 compatible = "renesas,msiof-r8a7790",
940 "renesas,rcar-gen2-msiof";
941 reg = <0 0xe6e00000 0 0x0064>;
942 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
943 clocks = <&cpg CPG_MOD 205>;
944 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
945 <&dmac1 0x41>, <&dmac1 0x42>;
946 dma-names = "tx", "rx", "tx", "rx";
947 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
948 resets = <&cpg 205>;
949 #address-cells = <1>;
950 #size-cells = <0>;
951 status = "disabled";
952 };
953
954 msiof3: spi@e6c90000 {
955 compatible = "renesas,msiof-r8a7790",
956 "renesas,rcar-gen2-msiof";
957 reg = <0 0xe6c90000 0 0x0064>;
958 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
959 clocks = <&cpg CPG_MOD 215>;
960 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
961 <&dmac1 0x45>, <&dmac1 0x46>;
962 dma-names = "tx", "rx", "tx", "rx";
963 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
964 resets = <&cpg 215>;
965 #address-cells = <1>;
966 #size-cells = <0>;
967 status = "disabled";
968 };
969
970 can0: can@e6e80000 {
971 compatible = "renesas,can-r8a7790",
972 "renesas,rcar-gen2-can";
973 reg = <0 0xe6e80000 0 0x1000>;
974 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
975 clocks = <&cpg CPG_MOD 916>,
976 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
977 clock-names = "clkp1", "clkp2", "can_clk";
978 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
979 resets = <&cpg 916>;
980 status = "disabled";
981 };
982
983 can1: can@e6e88000 {
984 compatible = "renesas,can-r8a7790",
985 "renesas,rcar-gen2-can";
986 reg = <0 0xe6e88000 0 0x1000>;
987 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
988 clocks = <&cpg CPG_MOD 915>,
989 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
990 clock-names = "clkp1", "clkp2", "can_clk";
991 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
992 resets = <&cpg 915>;
993 status = "disabled";
994 };
995
996 vin0: video@e6ef0000 {
997 compatible = "renesas,vin-r8a7790",
998 "renesas,rcar-gen2-vin";
999 reg = <0 0xe6ef0000 0 0x1000>;
1000 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1001 clocks = <&cpg CPG_MOD 811>;
1002 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1003 resets = <&cpg 811>;
1004 status = "disabled";
1005 };
1006
1007 vin1: video@e6ef1000 {
1008 compatible = "renesas,vin-r8a7790",
1009 "renesas,rcar-gen2-vin";
1010 reg = <0 0xe6ef1000 0 0x1000>;
1011 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1012 clocks = <&cpg CPG_MOD 810>;
1013 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1014 resets = <&cpg 810>;
1015 status = "disabled";
1016 };
1017
1018 vin2: video@e6ef2000 {
1019 compatible = "renesas,vin-r8a7790",
1020 "renesas,rcar-gen2-vin";
1021 reg = <0 0xe6ef2000 0 0x1000>;
1022 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1023 clocks = <&cpg CPG_MOD 809>;
1024 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1025 resets = <&cpg 809>;
1026 status = "disabled";
1027 };
1028
1029 vin3: video@e6ef3000 {
1030 compatible = "renesas,vin-r8a7790",
1031 "renesas,rcar-gen2-vin";
1032 reg = <0 0xe6ef3000 0 0x1000>;
1033 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1034 clocks = <&cpg CPG_MOD 808>;
1035 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1036 resets = <&cpg 808>;
1037 status = "disabled";
1038 };
1039
1040 rcar_sound: sound@ec500000 {
1041 /*
1042 * #sound-dai-cells is required
1043 *
1044 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1045 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1046 */
1047 compatible = "renesas,rcar_sound-r8a7790",
1048 "renesas,rcar_sound-gen2";
1049 reg = <0 0xec500000 0 0x1000>, /* SCU */
1050 <0 0xec5a0000 0 0x100>, /* ADG */
1051 <0 0xec540000 0 0x1000>, /* SSIU */
1052 <0 0xec541000 0 0x280>, /* SSI */
1053 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1054 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1055
1056 clocks = <&cpg CPG_MOD 1005>,
1057 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1058 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1059 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1060 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1061 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1062 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1063 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1064 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1065 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1066 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1067 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1068 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1069 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1070 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1071 <&cpg CPG_CORE R8A7790_CLK_M2>;
1072 clock-names = "ssi-all",
1073 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1074 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1075 "ssi.1", "ssi.0",
1076 "src.9", "src.8", "src.7", "src.6",
1077 "src.5", "src.4", "src.3", "src.2",
1078 "src.1", "src.0",
1079 "ctu.0", "ctu.1",
1080 "mix.0", "mix.1",
1081 "dvc.0", "dvc.1",
1082 "clk_a", "clk_b", "clk_c", "clk_i";
1083 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1084 resets = <&cpg 1005>,
1085 <&cpg 1006>, <&cpg 1007>,
1086 <&cpg 1008>, <&cpg 1009>,
1087 <&cpg 1010>, <&cpg 1011>,
1088 <&cpg 1012>, <&cpg 1013>,
1089 <&cpg 1014>, <&cpg 1015>;
1090 reset-names = "ssi-all",
1091 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1092 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1093 "ssi.1", "ssi.0";
1094
1095 status = "disabled";
1096
1097 rcar_sound,dvc {
1098 dvc0: dvc-0 {
1099 dmas = <&audma1 0xbc>;
1100 dma-names = "tx";
1101 };
1102 dvc1: dvc-1 {
1103 dmas = <&audma1 0xbe>;
1104 dma-names = "tx";
1105 };
1106 };
1107
1108 rcar_sound,mix {
1109 mix0: mix-0 { };
1110 mix1: mix-1 { };
1111 };
1112
1113 rcar_sound,ctu {
1114 ctu00: ctu-0 { };
1115 ctu01: ctu-1 { };
1116 ctu02: ctu-2 { };
1117 ctu03: ctu-3 { };
1118 ctu10: ctu-4 { };
1119 ctu11: ctu-5 { };
1120 ctu12: ctu-6 { };
1121 ctu13: ctu-7 { };
1122 };
1123
1124 rcar_sound,src {
1125 src0: src-0 {
1126 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1127 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1128 dma-names = "rx", "tx";
1129 };
1130 src1: src-1 {
1131 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1132 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1133 dma-names = "rx", "tx";
1134 };
1135 src2: src-2 {
1136 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1137 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1138 dma-names = "rx", "tx";
1139 };
1140 src3: src-3 {
1141 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1142 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1143 dma-names = "rx", "tx";
1144 };
1145 src4: src-4 {
1146 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1147 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1148 dma-names = "rx", "tx";
1149 };
1150 src5: src-5 {
1151 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1152 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1153 dma-names = "rx", "tx";
1154 };
1155 src6: src-6 {
1156 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1157 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1158 dma-names = "rx", "tx";
1159 };
1160 src7: src-7 {
1161 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1162 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1163 dma-names = "rx", "tx";
1164 };
1165 src8: src-8 {
1166 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1167 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1168 dma-names = "rx", "tx";
1169 };
1170 src9: src-9 {
1171 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1172 dmas = <&audma0 0x97>, <&audma1 0xba>;
1173 dma-names = "rx", "tx";
1174 };
1175 };
1176
1177 rcar_sound,ssi {
1178 ssi0: ssi-0 {
1179 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1180 dmas = <&audma0 0x01>, <&audma1 0x02>,
1181 <&audma0 0x15>, <&audma1 0x16>;
1182 dma-names = "rx", "tx", "rxu", "txu";
1183 };
1184 ssi1: ssi-1 {
1185 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1186 dmas = <&audma0 0x03>, <&audma1 0x04>,
1187 <&audma0 0x49>, <&audma1 0x4a>;
1188 dma-names = "rx", "tx", "rxu", "txu";
1189 };
1190 ssi2: ssi-2 {
1191 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1192 dmas = <&audma0 0x05>, <&audma1 0x06>,
1193 <&audma0 0x63>, <&audma1 0x64>;
1194 dma-names = "rx", "tx", "rxu", "txu";
1195 };
1196 ssi3: ssi-3 {
1197 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1198 dmas = <&audma0 0x07>, <&audma1 0x08>,
1199 <&audma0 0x6f>, <&audma1 0x70>;
1200 dma-names = "rx", "tx", "rxu", "txu";
1201 };
1202 ssi4: ssi-4 {
1203 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1204 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1205 <&audma0 0x71>, <&audma1 0x72>;
1206 dma-names = "rx", "tx", "rxu", "txu";
1207 };
1208 ssi5: ssi-5 {
1209 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1210 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1211 <&audma0 0x73>, <&audma1 0x74>;
1212 dma-names = "rx", "tx", "rxu", "txu";
1213 };
1214 ssi6: ssi-6 {
1215 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1216 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1217 <&audma0 0x75>, <&audma1 0x76>;
1218 dma-names = "rx", "tx", "rxu", "txu";
1219 };
1220 ssi7: ssi-7 {
1221 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1222 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1223 <&audma0 0x79>, <&audma1 0x7a>;
1224 dma-names = "rx", "tx", "rxu", "txu";
1225 };
1226 ssi8: ssi-8 {
1227 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1228 dmas = <&audma0 0x11>, <&audma1 0x12>,
1229 <&audma0 0x7b>, <&audma1 0x7c>;
1230 dma-names = "rx", "tx", "rxu", "txu";
1231 };
1232 ssi9: ssi-9 {
1233 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1234 dmas = <&audma0 0x13>, <&audma1 0x14>,
1235 <&audma0 0x7d>, <&audma1 0x7e>;
1236 dma-names = "rx", "tx", "rxu", "txu";
1237 };
1238 };
1239 };
1240
1241 audma0: dma-controller@ec700000 {
1242 compatible = "renesas,dmac-r8a7790",
1243 "renesas,rcar-dmac";
1244 reg = <0 0xec700000 0 0x10000>;
1245 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1246 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1247 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1248 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1249 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1250 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1251 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1252 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1253 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1254 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1255 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1256 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1257 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1258 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1259 interrupt-names = "error",
1260 "ch0", "ch1", "ch2", "ch3",
1261 "ch4", "ch5", "ch6", "ch7",
1262 "ch8", "ch9", "ch10", "ch11",
1263 "ch12";
1264 clocks = <&cpg CPG_MOD 502>;
1265 clock-names = "fck";
1266 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1267 resets = <&cpg 502>;
1268 #dma-cells = <1>;
1269 dma-channels = <13>;
1270 };
1271
1272 audma1: dma-controller@ec720000 {
1273 compatible = "renesas,dmac-r8a7790",
1274 "renesas,rcar-dmac";
1275 reg = <0 0xec720000 0 0x10000>;
1276 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1277 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1278 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1279 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1280 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1281 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1282 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1283 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1284 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1285 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1286 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1287 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1288 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1289 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1290 interrupt-names = "error",
1291 "ch0", "ch1", "ch2", "ch3",
1292 "ch4", "ch5", "ch6", "ch7",
1293 "ch8", "ch9", "ch10", "ch11",
1294 "ch12";
1295 clocks = <&cpg CPG_MOD 501>;
1296 clock-names = "fck";
1297 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1298 resets = <&cpg 501>;
1299 #dma-cells = <1>;
1300 dma-channels = <13>;
1301 };
1302
1303 xhci: usb@ee000000 {
1304 compatible = "renesas,xhci-r8a7790",
1305 "renesas,rcar-gen2-xhci";
1306 reg = <0 0xee000000 0 0xc00>;
1307 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1308 clocks = <&cpg CPG_MOD 328>;
1309 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1310 resets = <&cpg 328>;
1311 phys = <&usb2 1>;
1312 phy-names = "usb";
1313 status = "disabled";
1314 };
1315
1316 pci0: pci@ee090000 {
1317 compatible = "renesas,pci-r8a7790",
1318 "renesas,pci-rcar-gen2";
1319 device_type = "pci";
1320 reg = <0 0xee090000 0 0xc00>,
1321 <0 0xee080000 0 0x1100>;
1322 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1323 clocks = <&cpg CPG_MOD 703>;
1324 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1325 resets = <&cpg 703>;
1326 status = "disabled";
1327
1328 bus-range = <0 0>;
1329 #address-cells = <3>;
1330 #size-cells = <2>;
1331 #interrupt-cells = <1>;
1332 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1333 interrupt-map-mask = <0xff00 0 0 0x7>;
1334 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1335 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1336 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1337
1338 usb@1,0 {
1339 reg = <0x800 0 0 0 0>;
1340 phys = <&usb0 0>;
1341 phy-names = "usb";
1342 };
1343
1344 usb@2,0 {
1345 reg = <0x1000 0 0 0 0>;
1346 phys = <&usb0 0>;
1347 phy-names = "usb";
1348 };
1349 };
1350
1351 pci1: pci@ee0b0000 {
1352 compatible = "renesas,pci-r8a7790",
1353 "renesas,pci-rcar-gen2";
1354 device_type = "pci";
1355 reg = <0 0xee0b0000 0 0xc00>,
1356 <0 0xee0a0000 0 0x1100>;
1357 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1358 clocks = <&cpg CPG_MOD 703>;
1359 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1360 resets = <&cpg 703>;
1361 status = "disabled";
1362
1363 bus-range = <1 1>;
1364 #address-cells = <3>;
1365 #size-cells = <2>;
1366 #interrupt-cells = <1>;
1367 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1368 interrupt-map-mask = <0xff00 0 0 0x7>;
1369 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1370 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1371 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1372 };
1373
1374 pci2: pci@ee0d0000 {
1375 compatible = "renesas,pci-r8a7790",
1376 "renesas,pci-rcar-gen2";
1377 device_type = "pci";
1378 clocks = <&cpg CPG_MOD 703>;
1379 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1380 resets = <&cpg 703>;
1381 reg = <0 0xee0d0000 0 0xc00>,
1382 <0 0xee0c0000 0 0x1100>;
1383 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1384 status = "disabled";
1385
1386 bus-range = <2 2>;
1387 #address-cells = <3>;
1388 #size-cells = <2>;
1389 #interrupt-cells = <1>;
1390 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1391 interrupt-map-mask = <0xff00 0 0 0x7>;
1392 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1393 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1394 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1395
1396 usb@1,0 {
1397 reg = <0x20800 0 0 0 0>;
1398 phys = <&usb2 0>;
1399 phy-names = "usb";
1400 };
1401
1402 usb@2,0 {
1403 reg = <0x21000 0 0 0 0>;
1404 phys = <&usb2 0>;
1405 phy-names = "usb";
1406 };
1407 };
1408
1409 sdhi0: sd@ee100000 {
1410 compatible = "renesas,sdhi-r8a7790",
1411 "renesas,rcar-gen2-sdhi";
1412 reg = <0 0xee100000 0 0x328>;
1413 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1414 clocks = <&cpg CPG_MOD 314>;
1415 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1416 <&dmac1 0xcd>, <&dmac1 0xce>;
1417 dma-names = "tx", "rx", "tx", "rx";
1418 max-frequency = <195000000>;
1419 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1420 resets = <&cpg 314>;
1421 status = "disabled";
1422 };
1423
1424 sdhi1: sd@ee120000 {
1425 compatible = "renesas,sdhi-r8a7790",
1426 "renesas,rcar-gen2-sdhi";
1427 reg = <0 0xee120000 0 0x328>;
1428 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MOD 313>;
1430 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1431 <&dmac1 0xc9>, <&dmac1 0xca>;
1432 dma-names = "tx", "rx", "tx", "rx";
1433 max-frequency = <195000000>;
1434 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1435 resets = <&cpg 313>;
1436 status = "disabled";
1437 };
1438
1439 sdhi2: sd@ee140000 {
1440 compatible = "renesas,sdhi-r8a7790",
1441 "renesas,rcar-gen2-sdhi";
1442 reg = <0 0xee140000 0 0x100>;
1443 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1444 clocks = <&cpg CPG_MOD 312>;
1445 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1446 <&dmac1 0xc1>, <&dmac1 0xc2>;
1447 dma-names = "tx", "rx", "tx", "rx";
1448 max-frequency = <97500000>;
1449 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1450 resets = <&cpg 312>;
1451 status = "disabled";
1452 };
1453
1454 sdhi3: sd@ee160000 {
1455 compatible = "renesas,sdhi-r8a7790",
1456 "renesas,rcar-gen2-sdhi";
1457 reg = <0 0xee160000 0 0x100>;
1458 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1459 clocks = <&cpg CPG_MOD 311>;
1460 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1461 <&dmac1 0xd3>, <&dmac1 0xd4>;
1462 dma-names = "tx", "rx", "tx", "rx";
1463 max-frequency = <97500000>;
1464 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1465 resets = <&cpg 311>;
1466 status = "disabled";
1467 };
1468
1469 mmcif0: mmc@ee200000 {
1470 compatible = "renesas,mmcif-r8a7790",
1471 "renesas,sh-mmcif";
1472 reg = <0 0xee200000 0 0x80>;
1473 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1474 clocks = <&cpg CPG_MOD 315>;
1475 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1476 <&dmac1 0xd1>, <&dmac1 0xd2>;
1477 dma-names = "tx", "rx", "tx", "rx";
1478 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1479 resets = <&cpg 315>;
1480 reg-io-width = <4>;
1481 status = "disabled";
1482 max-frequency = <97500000>;
1483 };
1484
1485 mmcif1: mmc@ee220000 {
1486 compatible = "renesas,mmcif-r8a7790",
1487 "renesas,sh-mmcif";
1488 reg = <0 0xee220000 0 0x80>;
1489 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1490 clocks = <&cpg CPG_MOD 305>;
1491 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1492 <&dmac1 0xe1>, <&dmac1 0xe2>;
1493 dma-names = "tx", "rx", "tx", "rx";
1494 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1495 resets = <&cpg 305>;
1496 reg-io-width = <4>;
1497 status = "disabled";
1498 max-frequency = <97500000>;
1499 };
1500
1501 sata0: sata@ee300000 {
1502 compatible = "renesas,sata-r8a7790",
1503 "renesas,rcar-gen2-sata";
1504 reg = <0 0xee300000 0 0x2000>;
1505 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1506 clocks = <&cpg CPG_MOD 815>;
1507 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1508 resets = <&cpg 815>;
1509 status = "disabled";
1510 };
1511
1512 sata1: sata@ee500000 {
1513 compatible = "renesas,sata-r8a7790",
1514 "renesas,rcar-gen2-sata";
1515 reg = <0 0xee500000 0 0x2000>;
1516 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1517 clocks = <&cpg CPG_MOD 814>;
1518 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1519 resets = <&cpg 814>;
1520 status = "disabled";
1521 };
1522
1523 ether: ethernet@ee700000 {
1524 compatible = "renesas,ether-r8a7790",
1525 "renesas,rcar-gen2-ether";
1526 reg = <0 0xee700000 0 0x400>;
1527 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1528 clocks = <&cpg CPG_MOD 813>;
1529 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1530 resets = <&cpg 813>;
1531 phy-mode = "rmii";
1532 #address-cells = <1>;
1533 #size-cells = <0>;
1534 status = "disabled";
1535 };
1536
1537 gic: interrupt-controller@f1001000 {
1538 compatible = "arm,gic-400";
1539 #interrupt-cells = <3>;
1540 #address-cells = <0>;
1541 interrupt-controller;
1542 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1543 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1544 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
1545 clocks = <&cpg CPG_MOD 408>;
1546 clock-names = "clk";
1547 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1548 resets = <&cpg 408>;
1549 };
1550
1551 pciec: pcie@fe000000 {
1552 compatible = "renesas,pcie-r8a7790",
1553 "renesas,pcie-rcar-gen2";
1554 reg = <0 0xfe000000 0 0x80000>;
1555 #address-cells = <3>;
1556 #size-cells = <2>;
1557 bus-range = <0x00 0xff>;
1558 device_type = "pci";
1559 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1560 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1561 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1562 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1563 /* Map all possible DDR as inbound ranges */
1564 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1565 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1566 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1567 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1568 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1569 #interrupt-cells = <1>;
1570 interrupt-map-mask = <0 0 0 0>;
1571 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1572 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1573 clock-names = "pcie", "pcie_bus";
1574 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1575 resets = <&cpg 319>;
1576 status = "disabled";
1577 };
1578
1579 vsp@fe920000 {
1580 compatible = "renesas,vsp1";
1581 reg = <0 0xfe920000 0 0x8000>;
1582 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1583 clocks = <&cpg CPG_MOD 130>;
1584 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1585 resets = <&cpg 130>;
1586 };
1587
1588 vsp@fe928000 {
1589 compatible = "renesas,vsp1";
1590 reg = <0 0xfe928000 0 0x8000>;
1591 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1592 clocks = <&cpg CPG_MOD 131>;
1593 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1594 resets = <&cpg 131>;
1595 };
1596
1597 vsp@fe930000 {
1598 compatible = "renesas,vsp1";
1599 reg = <0 0xfe930000 0 0x8000>;
1600 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1601 clocks = <&cpg CPG_MOD 128>;
1602 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1603 resets = <&cpg 128>;
1604 };
1605
1606 vsp@fe938000 {
1607 compatible = "renesas,vsp1";
1608 reg = <0 0xfe938000 0 0x8000>;
1609 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1610 clocks = <&cpg CPG_MOD 127>;
1611 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1612 resets = <&cpg 127>;
1613 };
1614
1615 jpu: jpeg-codec@fe980000 {
1616 compatible = "renesas,jpu-r8a7790",
1617 "renesas,rcar-gen2-jpu";
1618 reg = <0 0xfe980000 0 0x10300>;
1619 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1620 clocks = <&cpg CPG_MOD 106>;
1621 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1622 resets = <&cpg 106>;
1623 };
1624
1625 du: display@feb00000 {
1626 compatible = "renesas,du-r8a7790";
1627 reg = <0 0xfeb00000 0 0x70000>;
1628 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1629 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1630 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1631 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1632 <&cpg CPG_MOD 722>;
1633 clock-names = "du.0", "du.1", "du.2";
1634 status = "disabled";
1635
1636 ports {
1637 #address-cells = <1>;
1638 #size-cells = <0>;
1639
1640 port@0 {
1641 reg = <0>;
1642 du_out_rgb: endpoint {
1643 };
1644 };
1645 port@1 {
1646 reg = <1>;
1647 du_out_lvds0: endpoint {
1648 remote-endpoint = <&lvds0_in>;
1649 };
1650 };
1651 port@2 {
1652 reg = <2>;
1653 du_out_lvds1: endpoint {
1654 remote-endpoint = <&lvds1_in>;
1655 };
1656 };
1657 };
1658 };
1659
1660 lvds0: lvds@feb90000 {
1661 compatible = "renesas,r8a7790-lvds";
1662 reg = <0 0xfeb90000 0 0x1c>;
1663 clocks = <&cpg CPG_MOD 726>;
1664 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1665 resets = <&cpg 726>;
1666 status = "disabled";
1667
1668 ports {
1669 #address-cells = <1>;
1670 #size-cells = <0>;
1671
1672 port@0 {
1673 reg = <0>;
1674 lvds0_in: endpoint {
1675 remote-endpoint = <&du_out_lvds0>;
1676 };
1677 };
1678 port@1 {
1679 reg = <1>;
1680 lvds0_out: endpoint {
1681 };
1682 };
1683 };
1684 };
1685
1686 lvds1: lvds@feb94000 {
1687 compatible = "renesas,r8a7790-lvds";
1688 reg = <0 0xfeb94000 0 0x1c>;
1689 clocks = <&cpg CPG_MOD 725>;
1690 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1691 resets = <&cpg 725>;
1692 status = "disabled";
1693
1694 ports {
1695 #address-cells = <1>;
1696 #size-cells = <0>;
1697
1698 port@0 {
1699 reg = <0>;
1700 lvds1_in: endpoint {
1701 remote-endpoint = <&du_out_lvds1>;
1702 };
1703 };
1704 port@1 {
1705 reg = <1>;
1706 lvds1_out: endpoint {
1707 };
1708 };
1709 };
1710 };
1711
1712 prr: chipid@ff000044 {
1713 compatible = "renesas,prr";
1714 reg = <0 0xff000044 0 4>;
1715 };
1716
1717 cmt0: timer@ffca0000 {
1718 compatible = "renesas,r8a7790-cmt0",
1719 "renesas,rcar-gen2-cmt0";
1720 reg = <0 0xffca0000 0 0x1004>;
1721 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1722 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1723 clocks = <&cpg CPG_MOD 124>;
1724 clock-names = "fck";
1725 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1726 resets = <&cpg 124>;
1727
1728 status = "disabled";
1729 };
1730
1731 cmt1: timer@e6130000 {
1732 compatible = "renesas,r8a7790-cmt1",
1733 "renesas,rcar-gen2-cmt1";
1734 reg = <0 0xe6130000 0 0x1004>;
1735 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1736 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1737 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1738 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1739 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1740 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1741 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1742 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1743 clocks = <&cpg CPG_MOD 329>;
1744 clock-names = "fck";
1745 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1746 resets = <&cpg 329>;
1747
1748 status = "disabled";
1749 };
1750 };
1751
1752 thermal-zones {
1753 cpu_thermal: cpu-thermal {
1754 polling-delay-passive = <0>;
1755 polling-delay = <0>;
1756
1757 thermal-sensors = <&thermal>;
1758
1759 trips {
1760 cpu-crit {
1761 temperature = <95000>;
1762 hysteresis = <0>;
1763 type = "critical";
1764 };
1765 };
1766 cooling-maps {
1767 };
1768 };
1769 };
1770
1771 timer {
1772 compatible = "arm,armv7-timer";
1773 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1774 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1775 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1776 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
1777 };
1778
Marek Vasut16b6e4a2018-01-07 20:17:23 +0100[diff] [blame]1779 /* External USB clock - can be overridden by the board */
1780 usb_extal_clk: usb_extal {
1781 compatible = "fixed-clock";
1782 #clock-cells = <0>;
1783 clock-frequency = <48000000>;
1784 };
Marek Vasut16b6e4a2018-01-07 20:17:23 +0100[diff] [blame]1785};