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Lokesh Vutla3ef5ebe2013-02-17 23:34:35 +00001/*
2 * (C) Copyright 2013
3 * Texas Instruments Incorporated.
4 * Sricharan R <r.sricharan@ti.com>
5 *
6 * Derived from OMAP4 done by:
7 * Aneesh V <aneesh@ti.com>
8 *
9 * TI OMAP5 AND DRA7XX common configuration settings
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#ifndef __CONFIG_OMAP5_COMMON_H
31#define __CONFIG_OMAP5_COMMON_H
32
33/*
34 * High Level Configuration Options
35 */
36#define CONFIG_OMAP /* in a TI OMAP core */
37#define CONFIG_OMAP54XX /* which is a 54XX */
38#define CONFIG_OMAP_GPIO
39
40/* Get CPU defs */
41#include <asm/arch/cpu.h>
42#include <asm/arch/omap.h>
43
44/* Display CPU and Board Info */
45#define CONFIG_DISPLAY_CPUINFO
46#define CONFIG_DISPLAY_BOARDINFO
47
48/* Clock Defines */
49#define V_OSCK 19200000 /* Clock output from T2 */
50#define V_SCLK V_OSCK
51
52#define CONFIG_MISC_INIT_R
53
54#define CONFIG_OF_LIBFDT
55#define CONFIG_CMD_BOOTZ
56
57#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
58#define CONFIG_SETUP_MEMORY_TAGS
59#define CONFIG_INITRD_TAG
60
61/*
62 * Size of malloc() pool
63 * Total Size Environment - 128k
64 * Malloc - add 256k
65 */
66#define CONFIG_ENV_SIZE (128 << 10)
67#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
68/* Vector Base */
69#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
70
71/*
72 * Hardware drivers
73 */
74
75/*
76 * serial port - NS16550 compatible
77 */
78#define V_NS16550_CLK 48000000
79
80#define CONFIG_SYS_NS16550
81#define CONFIG_SYS_NS16550_SERIAL
82#define CONFIG_SYS_NS16550_REG_SIZE (-4)
83#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
84#define CONFIG_CONS_INDEX 3
85#define CONFIG_SYS_NS16550_COM3 UART3_BASE
86
87#define CONFIG_BAUDRATE 115200
88#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
89 115200}
90/* I2C */
91#define CONFIG_HARD_I2C
92#define CONFIG_SYS_I2C_SPEED 100000
93#define CONFIG_SYS_I2C_SLAVE 1
94#define CONFIG_DRIVER_OMAP34XX_I2C
95#define CONFIG_I2C_MULTI_BUS
96
97
98/* MMC */
99#define CONFIG_GENERIC_MMC
100#define CONFIG_MMC
101#define CONFIG_OMAP_HSMMC
102#define CONFIG_DOS_PARTITION
103
104/* MMC ENV related defines */
105#define CONFIG_ENV_IS_IN_MMC
106#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
107#define CONFIG_ENV_OFFSET 0xE0000
108#define CONFIG_CMD_SAVEENV
109
110#define CONFIG_SYS_CONSOLE_IS_IN_ENV
111
112/* Flash */
113#define CONFIG_SYS_NO_FLASH
114
115/* Cache */
116#define CONFIG_SYS_CACHELINE_SIZE 64
117#define CONFIG_SYS_CACHELINE_SHIFT 6
118
119/* commands to include */
120#include <config_cmd_default.h>
121
122/* Enabled commands */
123#define CONFIG_CMD_EXT2 /* EXT2 Support */
124#define CONFIG_CMD_FAT /* FAT support */
125#define CONFIG_CMD_I2C /* I2C serial bus support */
126#define CONFIG_CMD_MMC /* MMC support */
127#define CONFIG_CMD_SAVEENV
128
129/* Disabled commands */
130#undef CONFIG_CMD_NET
131#undef CONFIG_CMD_NFS
132#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
133#undef CONFIG_CMD_IMLS /* List all found images */
134
135/*
136 * Environment setup
137 */
138
139#define CONFIG_BOOTDELAY 3
140
141#define CONFIG_ENV_OVERWRITE
142
143#define CONFIG_EXTRA_ENV_SETTINGS \
144 "loadaddr=0x82000000\0" \
145 "console=ttyO2,115200n8\0" \
SRICHARAN Rd3501ed2013-04-01 05:52:39 +0000146 "fdt_high=0xffffffff\0" \
Lokesh Vutla3ef5ebe2013-02-17 23:34:35 +0000147 "usbtty=cdc_acm\0" \
148 "vram=16M\0" \
149 "mmcdev=0\0" \
150 "mmcroot=/dev/mmcblk0p2 rw\0" \
151 "mmcrootfstype=ext3 rootwait\0" \
152 "mmcargs=setenv bootargs console=${console} " \
153 "vram=${vram} " \
154 "root=${mmcroot} " \
155 "rootfstype=${mmcrootfstype}\0" \
156 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
157 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
158 "source ${loadaddr}\0" \
Nishanth Menon78fd0042013-04-01 05:52:40 +0000159 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
160 "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
161 "env import -t ${loadaddr} ${filesize}\0" \
Lokesh Vutla3ef5ebe2013-02-17 23:34:35 +0000162 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
163 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
164 "run mmcargs; " \
165 "bootm ${loadaddr}\0" \
166
167#define CONFIG_BOOTCOMMAND \
168 "mmc dev ${mmcdev}; if mmc rescan; then " \
169 "if run loadbootscript; then " \
170 "run bootscript; " \
171 "else " \
Nishanth Menon78fd0042013-04-01 05:52:40 +0000172 "if run loadbootenv; then " \
173 "run importbootenv; " \
174 "fi;" \
175 "if test -n ${uenvcmd}; then " \
176 "echo Running uenvcmd ...;" \
177 "run uenvcmd;" \
178 "fi;" \
179 "fi;" \
180 "if run loaduimage; then " \
181 "run mmcboot; " \
Lokesh Vutla3ef5ebe2013-02-17 23:34:35 +0000182 "fi; " \
183 "fi"
184
185#define CONFIG_AUTO_COMPLETE 1
186
187/*
188 * Miscellaneous configurable options
189 */
190
191#define CONFIG_SYS_LONGHELP /* undef to save memory */
192#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
193#define CONFIG_SYS_CBSIZE 256
194/* Print Buffer Size */
195#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
196 sizeof(CONFIG_SYS_PROMPT) + 16)
197#define CONFIG_SYS_MAXARGS 16
198/* Boot Argument Buffer Size */
199#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
200
201/*
202 * memtest setup
203 */
204#define CONFIG_SYS_MEMTEST_START 0x80000000
205#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
206
207/* Default load address */
208#define CONFIG_SYS_LOAD_ADDR 0x80000000
209
210/* Use General purpose timer 1 */
211#define CONFIG_SYS_TIMERBASE GPT2_BASE
212#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
213#define CONFIG_SYS_HZ 1000
214
215/*
216 * SDRAM Memory Map
217 * Even though we use two CS all the memory
218 * is mapped to one contiguous block
219 */
220#define CONFIG_NR_DRAM_BANKS 1
221
222#define CONFIG_SYS_SDRAM_BASE 0x80000000
223#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
224 GENERATED_GBL_DATA_SIZE)
225
226#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
227
228/* Defines for SDRAM init */
229#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
230#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
231#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
232#endif
233
234/* Defines for SPL */
235#define CONFIG_SPL
236#define CONFIG_SPL_FRAMEWORK
237#define CONFIG_SPL_TEXT_BASE 0x40300350
238#define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */
239#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
240#define CONFIG_SPL_DISPLAY_PRINT
241
242#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
243#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
244#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
245#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
246
247#define CONFIG_SPL_LIBCOMMON_SUPPORT
248#define CONFIG_SPL_LIBDISK_SUPPORT
249#define CONFIG_SPL_I2C_SUPPORT
250#define CONFIG_SPL_MMC_SUPPORT
251#define CONFIG_SPL_FAT_SUPPORT
252#define CONFIG_SPL_LIBGENERIC_SUPPORT
253#define CONFIG_SPL_SERIAL_SUPPORT
254#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
255
256/*
257 * 64 bytes before this address should be set aside for u-boot.img's
258 * header. That is 80E7FFC0--0x80E80000 should not be used for any
259 * other needs.
260 */
261#define CONFIG_SYS_TEXT_BASE 0x80E80000
262
263/*
264 * BSS and malloc area 64MB into memory to allow enough
265 * space for the kernel at the beginning of memory
266 */
267#define CONFIG_SPL_BSS_START_ADDR 0x84000000
268#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
269#define CONFIG_SYS_SPL_MALLOC_START 0x84100000
270#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
271#define CONFIG_SPL_GPIO_SUPPORT
272
273#endif /* __CONFIG_OMAP5_COMMON_H */